Systems and methods for identifying unending transactions
First Claim
Patent Images
1. A method for identifying unending transactions, the method comprising:
- monitoring an interface;
determining whether a transaction has timed out; and
flagging the transaction if it is determined that the transaction has timed out.
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Accused Products
Abstract
Disclosed are systems and methods for identifying unending transactions. In one embodiment, a system and a method pertain to monitoring an interface, determining whether a transaction has timed out, and flagging the transaction if it is determined that the transaction has timed out. In another method, a system and a method pertain to monitoring an interface, identifying a packet that arrives on the interface, determining whether the packet pertains to a transaction contained in a pending transaction list, and determining when the transaction should be completed if the transaction is not contained in the pending transaction list.
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Citations
34 Claims
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1. A method for identifying unending transactions, the method comprising:
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monitoring an interface;
determining whether a transaction has timed out; and
flagging the transaction if it is determined that the transaction has timed out. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for identifying unending transactions, the method comprising:
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monitoring an interface;
identifying a packet that arrives on the interface;
determining whether the packet pertains to a transaction contained in a pending transaction list; and
determining when the transaction should be completed if the transaction is not contained in the pending transaction list. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. A system for identifying unending transactions, the system comprising:
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means for monitoring an interface;
means for identifying packets that arrive on the interface;
means for determining when a transaction should be completed; and
means for determining when a transaction has timed out. - View Dependent Claims (18, 19, 20, 21, 22, 23)
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24. A virtual bus interface (VBI) stored on a computer-readable medium, the virtual bus VBI comprising:
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logic configured to monitor a point-to-point (P2P) interface;
logic configured to identify packets that arrive on the P2P interface;
logic configured to determine a time out time for a transaction to which a packet pertains; and
logic configured to determine when a transaction has timed out. - View Dependent Claims (25, 26, 27, 28, 29)
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30. A processor architecture verification system, comprising:
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a register transfer language (RTL) simulator that simulates operation of a processor and generates a first output in a first format, the RTL simulator including an interface;
a golden simulator that simulates operation of the processor and generates a second output in a second format;
a translator that translates at least one of the outputs for comparison with the other output, the translator including a virtual bus interface (VBI) that comprises logic configured to monitor a the RTL simulator interface, logic configured to determine a time out time for a transaction to which a packet on the RTL simulator interface pertains, and logic configured to determine when a transaction has timed out; and
a comparator that compares the first and second outputs after translation of the at least one output. - View Dependent Claims (31, 32, 33, 34)
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Specification