System and method for transmitting control information over and AC power network

• US 20050111560A1
• Filed: 10/27/2004
• Published: 05/26/2005
• Est. Priority Date: 11/26/2003
• Status: Active Grant

• Current Assignee: ADS Enterprises NZ Limited
• Original Assignee: ADS Enterprises NZ Limited
• Inventors: Haines, Antony Vincent
• Granted Patent: US 7,084,742 B2
• Time in Patent Office: Days
• US Class Current: 375/257
• CPC Class Codes: H04B 2203/5458 Monitor sensor; Alarm systems
• CPC Class Codes: H04B 3/54 Systems for transmission via power distribution lines
• CPC Class Codes: H04B 3/56 Circuits for coupling, blocking, or by-passing of signals

Abstract

The invention describes a transmission system for transmitting digital information via a power supply network. The proposed transmission device comprises a generator (4a) for generating a simulated digital wave-form carrying the digital information to be transmitted, wherein the simulated digital wave-form is built of predetermined harmonic frequencies of a signal frequency, and a high-voltage injector (4b) to inject the generated simulated digital wave-form carrying the digital information into the power supply network. The proposed receiving device (6) comprises an analog detector (21) for detecting predetermined harmonic frequencies of a signal frequency, and a logic device (22) to output a logic signal corresponding to the output of the analog detector (21) as said digital information.

Claims

1. A transmission device for transmitting digital information via a power supply network, comprising of:

a generator for generating a simulated digital wave-form carrying the digital information to be transmitted, wherein the simulated digital wave-form is built of predetermined harmonic frequencies of a signal frequency;

a high-voltage injector to inject the generated simulated digital wave-form carrying the digital information into the power supply network;

wherein said high-voltage injector comprises drive stage transistors to inject the generated simulated digital wave-form carrying the digital information into the power supply network; and

a chopping unit that rapidly turns the drive stage transistors on and off in conformance with the shape of the low frequency wave-form.

26. The transmission device of claim 1, wherein a feedback control that detects specific conditions of the power supply network to vary the chopping on/off cycle of the drive stage transistors accordingly and/or to shut down and turn on the drive stage transistors accordingly.

27. The transmission device of claim 1, wherein said digital information is:

date and/or time and/or time-zone information;

or

control information, which control information is preferably encrypted and comprises an addressing functionality so that at least one particular receiving device connected to said power supply network can access said control information.

28. The transmission device of claim 27, wherein said digital information is used in a device or chip integrally adapted, by means of the circuit logic or design of said device or chip to process said digital information to control a remote activation or operation of some manufacturer feature or to enhance the device or chip by integration of a trusted control feature and/or an accurately synchronized date and time;

or

for implementing secure remote instruction or operation of load management and switching devices used in high voltage power distribution systems.

2-25. -25. (canceled)

29. A receiving device for receiving digital information via a power supply network comprising of:

an analogue detector for detecting predetermined harmonic frequencies of a signal frequency; and

a logic device to output a logic signal corresponding to the output of the analogue detector as said digital information.

30. The receiving device of claim 29, wherein said predetermined harmonic frequencies of the signal frequency include the first and third harmonic frequencies of the signal frequency.

31. The receiving device of claim 29, comprising of an optical interface arranged in an output path of the logic device.

32. The receiving device of claim 30, comprising of an information retrieval unit to retrieve control information directed to said particular receiving device wherein said information retrieval unit comprises a decryption unit to verify whether or not said control information is addressed to said particular receiving device and to decrypt said control information with a predetermined key.

33. The receiving device of claim 30, wherein said digital information is:

date and/or time and/or time-zone information;

or

control information, which control information is preferably encrypted and comprises an addressing functionality so that at least one particular receiving device connected to said power supply network can access said control information.

34. The receiving device of claim 33, wherein said digital information is used in a device or chip integrally adapted, by means of the circuit logic or design of said device or chip to process said digital information to control a remote activation or operation of some manufacturer feature or to enhance the device or chip by integration of a trusted control feature and/or an accurately synchronized date and time;

or

for implementing secure remote instruction or operation of load management and switching devices used in high voltage power distribution systems.

35. The receiving device of claim 29, wherein a personal computer or other electronic device displaying or using date and time or private control information or instructions.

36. A method for transmitting digital information via a power supply network, comprising the steps of:

generating a simulated digital wave-form carrying the digital information to be transmitted in either a time synchronous or encrypted form, wherein the simulated digital wave-form is built of predetermined harmonic frequencies of a signal frequency; and

injecting the generated simulated digital wave-form carrying the digital information into the power supply network after having been modulated using the process described herein as chopping.

37. The method of claim 36, wherein the step of rapidly turning drive stage transistors on and off in conformance with the shape of the low frequency wave-form, or chopping, in particular at a frequency greater than 6 kHz.

38. The method of claim 37, wherein the steps of detecting specific conditions of the power supply network, and varying the chopping on/off cycle of the drive stage transistors accordingly and/or shutting down and turning on the drive stage transistors accordingly.