Transmission device with digital predistortion, and method for regulating predistortion in a transmission device

• US 20050111574A1
• Filed: 09/28/2004
• Published: 05/26/2005
• Est. Priority Date: 09/30/2003
• Status: Abandoned Application

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Ceylan, Nazim, Muller, Jan-Erik
• Application Number:
  US10/952,316
• Publication Number:
  US 20050111574A1
• Time in Patent Office: Days
• US Class Current: 375/296
• CPC Class Codes: H03F 1/32 Modifications of amplifiers to reduce non-linear distortion by negative feedback H03F1/34
• CPC Class Codes: H03F 1/3247 using feedback acting on predistortion circuits H03F1/3264 takes precedence
• CPC Class Codes: H03F 1/3294 Acting on the real and imaginary components of the input signal
• CPC Class Codes: H03F 1/52 Circuit arrangements for protecting such amplifiers monitoring arrangements G01R31/28; increasing reliability in communication systems, e.g. using redundancy H04B1/74
• CPC Class Codes: H03F 2200/462 the current being sensed
• CPC Class Codes: H03F 2200/468 the temperature being sensed
• CPC Class Codes: H03F 2200/471 the voltage being sensed
• CPC Class Codes: H03F 3/24 of transmitter output stages

Abstract

One or more aspects of the present invention relate to a transmission device having a digital predistortion unit which has a control input to which a control signal (CONT1) is applied. The control signal is output by a power control unit which evaluates a power control signal (LS). The predistortion unit distorts a baseband signal which is to be transmitted whenever the linearity of a power amplifier can no longer be observed at the currently required power without predistortion. To this end, the baseband signal is multiplied in complex fashion by a predistortion coefficient which is dependent on the level of the baseband signal.

Claims

1. A transmission device, comprising:

a processor unit for providing a first discrete-value component (I) of a baseband signal (DAT1) at a first output and a second discrete-value component (Q) of the baseband signal (DAT1) at a second output;

a predistortion unit, operatively associated with the outputs of the processor unit, having a first and a second input and having a first and a second output,

wherein the predistortion unit has a coefficient unit for ascertaining one or more predistortion coefficients (KOEFF1), which represent complex values, on the basis of a control signal (CONT1) at a control input on the coefficient unit, a level for the first component (I), which is applied to the first input, and a level for the second component (Q), which is applied to the second input,

wherein the predistortion unit has a multiplication unit operable to output an output signal (DAT2), which is derived from the first component (I), which is applied to the first input, and from the second component (Q), which is applied to the second input, of the baseband signal (DAT1), and from the predistortion coefficient (KOEFF1), with a first discrete-value component (I2) at the first output and with a second discrete-value component (Q2) at the second output;

respective digital/analog conversion devices operatively associated with the outputs on the predistortion unit;

a modulator unit having a local oscillator input for supplying a local oscillator signal (OSC), a first input for supplying a first continuous-value signal, a second input for supplying a second continuous-value signal, which are coupled to respective outputs of the digital/analog conversion devices, and an output for outputting a complex-form output signal;

an amplification device with regulatable gain, whose input is operatively associated with the output of the modulator unit,

wherein the predistortion unit has a first and a second operating state and is configured to respectively output signals (I), (O) at the first and second outputs in the first operating state and to respectively output the first and second components (I2, Q2) of the derived output signal (DAT2) at the first and second outputs in the second operating state,

wherein the predistortion unit can be switched to the first or to the second operating state by the first control signal (CONT1) at the control input; and

a power control unit having an input for supplying a discrete-value power control signal (LS) to provide the first control signal (CONT1) at a first output and a second control signal at a second output, the first output being coupled to the control input of the predistortion unit, and the second output being coupled to a control input on the amplification device.

2. The transmission device of claim 1, wherein the first control signal (CONT1) at the first output and the second control signal at the second output of the power control unit are in the form of an identical control signal.

3. The transmission device of claim 1, wherein an output on the amplification device with regulatable gain is operatively coupled to a further amplification device which has a known gain factor.

4. The transmission device of claim 1, further comprising:

at least one sensor circuit for detecting changes in operating conditions in the transmission device and for generating signals derived therefrom at an output, the output being coupled to a second control input on the predistortion unit, where the coefficient unit is designed to ascertain the predistortion coefficient on the basis of a control signal at the second control input.

5. The transmission device of claim 3, wherein the predistortion coefficients (KOEFF1) of the predistortion unit form an inverse signal transfer function for at least one of the amplification devices located downstream of the distortion unit.

6. The transmission device of claim 1, wherein the coefficient unit for ascertaining the predistortion coefficients (KOEFF1) of the predistortion unit comprises a memory apparatus containing stored predistortion coefficients (KOEFF1) and also an address calculation unit, the address calculation unit configured to generate an address signal (ADR) for a predistortion coefficient stored in the memory apparatus from the level of the first and second components (I, Q) and from the control signal (CONT1) at the first control input, and the memory apparatus configured to provide the predistortion coefficient (KOEFF1) determined by the address signal (ADR) to the multiplication unit.

7. The transmission device of claim 1, wherein the first component (I) represents an inphase component and the second component (Q) represents a quadrature component.

8. The transmission device of claim 1, wherein the first component (I) is an amplitude and the second component (Q) is a phase.

9. The transmission device of claim 3, wherein the output of the further amplification device has a detector located downstream of it to detect an impedance change and is coupled to the processor unit for transferring the impedance change.

10. The transmission device of claim 9, wherein the detector comprises a directional coupler.

11. The transmission device of claim 9, wherein the detector detects a first amplitude magnitude and a first phase for a signal coming from the amplification device and a second amplitude magnitude and a second phase for a signal coming from a circuit downstream of the output of the amplification device.

12. The transmission device of claim 9, wherein the detector is situated between the further amplification device and an antenna.

13. The transmission device of claim 12, wherein the detector is operable to detect an impedance change in the antenna.

14. The transmission device of claim 1, wherein the predistortion unit has a filter with adjustable filter bandwidth located downstream of it, the filter comprising an actuating input which is coupled to the processor unit.

15. A method for regulating predistortion for a discrete-value signal (DAT1) in a transmission device, comprising:

multiplying first and second components (I, Q) of the signal (DAT1) by a complex predistortion coefficient (KOEFF1) when a level for an output signal from a regulatable amplification device is exceeded as determined by a control signal (CONT1), where the coefficient (KOEFF1) is dependent on respective levels of the first and second components (I, Q) of the signal (DAT1) and on a control signal (CONT1).

16. The method as claimed in claim 15, wherein the predistortion coefficient (KOEFF1) is selected from a set of stored predistortion coefficients.

17. The method of claim 15, further comprising:

ascertaining changing operating conditions in the amplification device;

deriving a signal (CONT2) from the changing operating conditions; and

using the signal (CONT2) to ascertain the predistortion coefficient (KOEFF1).

18. The method of claim 15, wherein the predistortion coefficient forms an inverse signal transfer function for the amplification device.

19. The method of claim 15, further comprising:

ascertaining an impedance change in an antenna;

deriving a signal (CONT2) from the changing impedance; and

using the signal (CONT2) to ascertain the predistortion coefficient (KOEFF1).

20. The method of claim 15, further comprising:

changing a filter from a first filter bandwidth to a second filter bandwidth during predistortion, the second filter bandwidth being larger than the first filter bandwidth.