Energy-focused re-compilation of executables and hardware mechanisms based on compiler-architecture interaction and compiler-inserted control
First Claim
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1. A method, for use in a processor context, comprising of:
- analyzing a program executable at compile time;
creating an intermediate program representation of the executable;
analyzing the intermediate representation;
performing a transformation on the intermediate representation such that a design objective is optimized;
generating optimized program executable from the intermediate representation;
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Abstract
A method comprising of analyzing and transforming a program executable at compile-time such that a processor design objective is optimized. A method including analyzing an executable to estimate energy consumption of an application component in a processor. A method including transforming an executable to reduce energy consumption in a processor. A processor framework controlled by compiler inserted control that statically exposes parallelism in an instruction sequence. A processor framework to reduce energy consumption in an instruction memory system with compiler inserted control.
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Citations
22 Claims
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1. A method, for use in a processor context, comprising of:
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analyzing a program executable at compile time;
creating an intermediate program representation of the executable;
analyzing the intermediate representation;
performing a transformation on the intermediate representation such that a design objective is optimized;
generating optimized program executable from the intermediate representation;
- View Dependent Claims (2, 3, 4, 5)
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6. A method, for use in an application or processor context, comprising of:
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analyzing a program executable at compile time;
creating an intermediate program representation of the executable;
analyzing the intermediate representation;
estimating energy consumption in a processor for an instruction sequence of one or more instructions in an application. - View Dependent Claims (7, 8, 9)
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10. A method wherein:
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control information is added at compile time related to execution of a sequence of instructions, of one or more instructions, and controlling plural architectural components during execution;
control information related to a sequence of instructions, of one or more instructions, encoded into a processor instruction. - View Dependent Claims (11, 12, 13, 14, 15, 17)
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16. A method wherein control information inserted at compile time comprises of:
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which instructions in an instruction sequence are to be issued in parallel at runtime;
additional information related to one or more of the following aspects;
which instruction memory structure an instruction sequence should be fetched from, length of the instruction sequence, branch prediction mechanism, and data memory access mechanism. - View Dependent Claims (18)
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- 19. A method, wherein control information is inserted at compile time to determine explicitly which instruction memory structure an instruction sequence should be fetched from.
Specification