Semiconductor devices

• US 20050116284A1
• Filed: 09/24/2002
• Published: 06/02/2005
• Est. Priority Date: 11/21/2001
• Status: Active Grant

• Current Assignee: Tongji University
• Original Assignee: Tongji University
• Inventors: Chen, Xingbi
• Granted Patent: US 7,230,310 B2
• Time in Patent Office: Days
• US Class Current: 257/329
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/7395 Vertical transistors, e.g. vertical IGBT
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/861 Diodes
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device consists of a voltage-sustaining layer between a conductive contact layer and a conductive device feature layer, wherein said voltage-sustaining layer consists of at least one semiconductor region and at least one dielectric region with high permittivity, both said semiconductor regions and dielectric regions contact with the interface formed by said device feature layer and contact layer, said semiconductor regions contact with said dielectric regions each to other, and the contact surface formed thereof is perpendicular to or approximately perpendicular to said contact layer and device feature layer.

Claims

1. A semiconductor device comprising a voltage-sustaining layer between a conductive contact layer and a conductive device feature layer, characterized in that:

said voltage-sustaining layer consists of at least one of the semiconductor regions and at least one of the high permittivity dielectric regions, both said semiconductor regions and dielectric regions contact with the interface formed by said device feature layer and contact layer, said semiconductor regions contact with said dielectric regions each other, and the contact surface formed thereof is perpendicular to or approximately perpendicular to said contact layer and device feature layer.

2. The semiconductor device according to claim 1, characterized in that:

both said semiconductor regions and dielectric regions contact with the interface formed by said device feature layer and contact layer, wherein this contact may be direct contact, or indirect contact through a thin semiconductor region or a thin dielectric region.

3. The semiconductor device according to claim 1, characterized in that:

said semiconductor regions contact with said dielectric regions each other, wherein this contact may be direct contact or indirect contact through a thin and low permittivity dielectric region.

4. The semiconductor device according to claim 1, characterized in that:

at least one of said semiconductor regions and at least one of said dielectric regions compose a cell, many of said cells are close packed so as to form said voltage-sustaining layer.

5. The semiconductor device according to claim 1, characterized in that:

said semiconductor regions are formed by a semiconductor of a first conductivity type, said device feature layer is formed by a heavily-doped semiconductor of a second conductivity type and said contact layer is formed by a heavily-doped semiconductor of a first conductivity type.

6. The semiconductor device according to claim 1, characterized in that:

said semiconductor regions are formed by a semiconductor of a first conductivity type, said contact layer is formed by a heavily-doped semiconductor of a first conductivity type with a thin semiconductor of a first conductivity type thereon, wherein said thin semiconductor of a first conductivity type contacts directly with said voltage-sustaining layer.

7. The semiconductor device according to claim 1, characterized in that:

said semiconductor regions contain not only a portion of semiconductor of a first conductivity type but also a portion of semiconductor of a second conductivity type;

wherein both the semiconductor of a first conductivity type and the semiconductor of a second conductivity type contact directly with said device feature layer and said contact layer, and said device feature layer is a heavily-doped semiconductor region of a second conductivity type.

8. The semiconductor device according to claim 1, characterized in that:

said semiconductor regions contain not only a portion of semiconductor of a first conductivity type, but also a portion of semiconductor of a second conductivity type;

wherein the semiconductor of a first conductivity type contacts directly with both said device feature layer and said contact layer, the semiconductor of a second conductivity type contacts directly with said device feature layer and contacts indirectly with said contact layer through a thin and high permittivity dielectric layer or a thin and low permittivity dielectric layer, and said device feature layer is a heavily-doped semiconductor region of a second conductivity type.

9. The semiconductor device according to claim 7 or claim 8, characterized in that:

there is a high permittivity dielectric region between the semiconductors of said two different conductivity types.

10. The semiconductor device according to claim 1, characterized in that:

said contact layer is a heavily-doped semiconductor of a second conductivity type.

11. The semiconductor device according to claim 1, characterized in that:

said contact layer is a heavily-doped semiconductor of a second conductivity type with a thin semiconductor layer of a first conductivity type thereon, wherein said thin semiconductor layer of a first conductivity type contacts directly with the voltage-sustaining layer.

12. A semiconductor device according to claim 1, wherein the device feature region is a metal.

13. A semiconductor device according to claim 1, wherein the device feature region consists of a metal and a heavily doped semiconductor region of the second conductivity type.

14. A semiconductor device according to claim 1, wherein the contact region is a metal.

15. A semiconductor device according to claim 1, wherein the contact region consists of a metal and a heavily doped semiconductor region of the first conductivity type.