Amplifier system with current-mode servo feedback

• US 20050116773A1
• Filed: 12/07/2004
• Published: 06/02/2005
• Est. Priority Date: 05/21/2003
• Status: Active Grant

• Current Assignee: Biourja Energy Systems, Llc
• Original Assignee: World Energy Labs Incorporated
• Inventors: Laletin, William H.
• Granted Patent: US 7,253,680 B2
• Time in Patent Office: Days
• US Class Current: 330/69
• CPC Class Codes: G01R 31/3004 Current or voltage test
• CPC Class Codes: G01R 31/31706 involving differential digital signals, e.g. testing differential signal circuits, using differential signals for testing
• CPC Class Codes: G01R 31/31716 Testing of input or output with loop-back
• CPC Class Codes: G01R 31/386 using test-loads
• CPC Class Codes: H03F 1/34 Negative-feedback-circuit arrangements with or without positive feedback H03F1/02 - H03F1/30, H03F1/38 - H03F1/50, H03F3/50 take precedence ; for rejection of common mode signals H03F3/45479
• CPC Class Codes: H03F 2200/261 Amplifier which being suitable for instrumentation applications
• CPC Class Codes: H03F 2200/91 the amplifier has a current mode topology
• CPC Class Codes: H03F 2203/45138 Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers
• CPC Class Codes: H03F 2203/45212 the differential amplifier being designed to have a reduced offset
• CPC Class Codes: H03F 2203/45521 the FBC comprising op amp stages, e.g. cascaded stages of the dif amp and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45592 the IC comprising one or more buffer stages other than emitter or source followers between the input signal leads and input leads of the dif amp, e.g. inverter stages
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03F 3/45479 characterised by the way of common mode signal rejection
• CPC Class Codes: H03F 3/45968 by offset reduction

Abstract

A system and method for compensating an amplifier apparatus for low frequency and/or DC components of an externally applied input signal as well as for any voltage offsets contributed by the amplifier circuitry. Band-limited servo feedback is applied to predetermined nodes in the forward gain path to null out unwanted signal components, leaving a residual signal that, when amplified, will be centered around ground, so that the full dynamic range of the amplifier system may be utilized. Consequently, the signal-to-noise ratio available at the output of the amplifier system will be maximized. The servo compensation may either operate in continuous time, or it may be held constant once a suitable level of compensation has been established, or it may be adjusted from time to time to accommodate slow variations of the average DC component of the input signal.

Claims

1. An amplifier apparatus comprising:

differential inputs disposed to receive a first and second input signal;

a primary differential amplifier having inverting and non-inverting input nodes receiving said differential inputs through respective first and second impedance elements and providing a main output signal; and

feedback circuitry disposed to sample said main output signal and convey complementary current-mode negative feedback signals to said inverting and non-inverting input nodes.

2. The amplifier apparatus of claim 1, wherein said current-mode feedback signals are each servo feedback signals having the same low-pass characteristic.

3. The amplifier apparatus according to claim 1 further comprising controllable circuitry to adjust common-mode gain of said primary differential amplifier at DC and at selected AC frequencies.

4. The amplifier apparatus according to claim 1 further comprising controllable circuitry to adjust the differential mode gain of said primary differential amplifier at DC and at selected AC frequencies.

5. The amplifier apparatus according to claim 1 further comprising controllable circuitry to adjust the input offset voltage of said primary differential amplifier.

6. The amplifier apparatus according to claim 1, further comprising a unity-gain input buffer connected in series with each of said differential inputs.

7. The amplifier apparatus according to claim 6, further comprising:

a biasing element disposed between the input of the one of said unity-gain buffers and a reference potential; and

a biasing element disposed between the input of the other of said unity-gain buffers and said reference potential.

8. The amplifier apparatus according to claim 6 further comprising controllable means to adjust input offset voltages of said unity-gain input buffers.

9. The amplifier apparatus according to claim 6 further comprising controllable means to compensate for bias current required for proper operation of the non-inverting input of each said unity-gain input buffers.

17. The amplifier apparatus according to claim 1 wherein said complementary negative feedback signals have substantially identical magnitudes.

18. The amplifier apparatus according to claim 1 wherein said feedback circuitry comprises:

an integrator; and

a first and second controllable current-source controlled by said integrator, said current sources providing current-mode output signals of opposite relative polarity.

19. The amplifier apparatus according to claim 18 wherein said integrator further comprises means to produce an inverted signal controlling at least one said current source.

20. The amplifier apparatus according to claim 18 wherein said integrator comprises:

an analog-to-digital converter disposed to sample said main output signal and provide a digital output signal;

a virtual integrator receiving said digital output signal and providing a digital integral signal representing the time-integral said main output signal; and

a digital-to-analog converter that receives said digital integral signal and provides a corresponding analog signal representing a control signal adapted to control said first and second current sources.

21. The amplifier apparatus according to claim 18 wherein:

said first controlled current source provides a first bipolar output current that is inversely proportional to a control signal from said integrator; and

said second controlled current source provides a second bipolar output current that is directly proportional to said control signal.

22. The amplifier apparatus according to claim 18 wherein:

said first controlled current source provides a first bipolar output current that is inversely proportional to a control signal from said integrator; and

said second controlled current source provides a second bipolar output current that is directly proportional to said control signal.

23. The amplifier apparatus according to claim 18 wherein said

first controlled current source provides a first unipolar output current that is inversely proportional to a control signal from said integrator;

and

said second controlled current source provides a unipolar output current that is directly proportional to said control signal from said integrator.

24. The amplifier apparatus according to claim 1 further comprising:

a servo controller; and

circuitry adapted to communicate with an external controller.

25. The amplifier apparatus of claim 1 further comprising:

track and hold circuitry coupled to said feedback circuitry.

26. The amplifier apparatus according to claim 18 further comprising:

a controllable low-pass filter disposed to reduce the high frequency content of signals input to said integrator.

27. The amplifier apparatus according to claim 18 further comprising:

a controllable notch filter disposed to reduce the amplitude of a predetermined range of frequencies within signals input to said integrator.

28. The amplifier apparatus according to claim 18 further comprising:

a controllable impulse noise discriminator disposed to reduce the impulse noise content of signals input to the integrator.

29. The amplifier apparatus according to claim 1 further comprising circuitry for developing a control signal for at least one controlled voltage source.

31. The signal detection and amplification of claim 29 adapted to test electrochemical cells.

32. The signal detection and amplification system of claim 29 adapted to monitor a plurality of electrochemical cells.

33. The signal detection and amplification system of claim 29 adapted to provide feedback to a charger for electrochemical cells.

34. The signal detection and amplification system of claim 29 adapted to analyze impedance of electrochemical cells.

10. An amplifier apparatus comprising:

a first input differential amplifier disposed to receive a first input signal at its non-inverting input and output a first intermediate output signal;

a second input differential amplifier disposed to receive a second input signal at its non-inverting input and output a second intermediate output signal;

a primary differential amplifier disposed to receive at its non-inverting input said first intermediate output signal conveyed through a first impedance element and to receive at its inverting input said second intermediate output signal conveyed through a second impedance element, and provide a main output signal at its output node; and

feedback circuitry disposed to sample said main output signal and convey a first negative feedback signal to said inverting input of said first input differential amplifier, and a second negative feedback signal to said inverting input of said second input differential amplifier.

11. The amplifier apparatus according to claim 10 further comprising:

a third impedance element connected between the inverting input of said primary differential amplifier and said output node of said primary differential amplifier; and

a forth impedance element connected between the non-inverting input of said primary differential amplifier and a reference potential.

12. The amplifier apparatus of claim 10 comprising:

a fifth impedance element connected between the inverting input of said first input differential amplifier and the output of said first input differential amplifier;

a sixth impedance element connected between the inverting input of said second input differential amplifier and the output of said second input differential amplifier; and

a seventh impedance element connected between said inverting inputs of said first and second input differential amplifiers.

13. The amplifier apparatus according to claim 10, further comprising:

a biasing element disposed between the non-inverting input of a first input differential amplifier and a reference potential; and

a biasing element disposed between the non-inverting input of a second input differential amplifier and a reference potential.

14. The amplifier apparatus according to claim 10 further comprising circuitry to adjust common-mode gain of at least one of said input differential amplifiers at selected frequencies.

15. The amplifier apparatus according to claim 10 further comprising circuitry to adjust differential-mode gain of at least one of said input differential amplifiers at selected frequencies.

16. The amplifier apparatus according to claim 10 further comprising circuitry to compensate for bias current required for proper operation of the non-inverting input of each said differential amplifier.

30. A signal detection and amplification system comprising amplifier apparatus having:

differential inputs disposed to receive a first and second input signal;

a primary differential amplifier receiving said differential inputs and providing a main output signal; and

feedback circuitry disposed to sample said main output signal and convey complementary current-mode negative feedback signals to said differential inputs.

35. A method for compensating the output of an amplifier system comprising:

integrating said output to generate a feedback control signal;

controlling a pair of complementary current mode feedback signals with said feedback control signal;

connecting said pair of complementary current mode feedback signals to input nodes of a primary amplifier wherein said input nodes are connected through impedance elements to differential inputs of said amplifier system.

36. The method according to claim 35 wherein said feedback signal causes said amplifier system to exhibit a high pass characteristic and attenuate a predetermined low-frequency component of said output.

37. The method according to claim 35 comprising:

coupling a differential input signal to inputs of each of two unity gain amplifiers, whereby the first unity-gain amplifier produces a first intermediate output signal and the second unity-gain amplifier produces a second intermediate output signal;

conveying said first intermediate output signal through a first impedance element to the non-inverting input of a primary differential amplifier; and

conveying said second intermediate output signal through a second impedance element to the inverting input of said primary differential amplifier that provides a main output signal.

38. The method according to claim 35 wherein said integrating step is performed by a controllable integrator including only analog circuitry.

39. The method according to claim 35 wherein said step of integrating is performed by a controllable integrator including a combination of analog and digital circuitry.

40. An amplifier apparatus comprising:

a primary amplifier providing a main output signal; and

feedback means disposed to sample said main output signal and convey complementary current-mode negative feedback signals to said primary amplifier.

41. An amplifier apparatus according to claim 40, wherein the DC value of said main output signal is substantially equal to a reference potential.