Method to form ultra high quality silicon-containing compound layers

• US 20050118837A1
• Filed: 07/18/2003
• Published: 06/02/2005
• Est. Priority Date: 07/19/2002
• Status: Active Grant

• Current Assignee: ASM IP Holding B.V. (ASM International NV)
• Original Assignee: ASM America Incorporated (ASM International NV)
• Inventors: Weeks, Keith D., Pomarede, Christophe F., Werkhoven, Christiaan J., Todd, Michael A.
• Granted Patent: US 7,297,641 B2
• Time in Patent Office: Days
• US Class Current: 438/791
• CPC Class Codes: C23C 16/24 Deposition of silicon only
• CPC Class Codes: C23C 16/345 Silicon nitride
• CPC Class Codes: C23C 16/45523 Pulsed gas flow or change of composition over time
• CPC Class Codes: C23C 16/45525 Atomic layer deposition [ALD]
• CPC Class Codes: C23C 16/56 After-treatment
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02211 the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• CPC Class Codes: H01L 21/02247 formation by nitridation, e.g. nitridation of the substrate
• CPC Class Codes: H01L 21/02252 formation by plasma treatment, e.g. plasma oxidation of the substrate after treatment of an insulating film by plasma H01L21/3105 and subgroups
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/3144 on silicon
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 21/31662 of silicon in uncombined form
• CPC Class Codes: H01L 21/3185 of siliconnitrides

Abstract

Multiple sequential processes are conducted in a reaction chamber to form ultra high quality silicon-containing compound layers, including silicon nitride layers. In a preferred embodiment, a silicon layer is deposited on a substrate using trisilane as the silicon precursor. A silicon nitride layer is then formed by nitriding the silicon layer. By repeating these steps, a silicon nitride layer of a desired thickness is formed.

Claims

1. A method of forming a silicon-containing compound layer in an integrated circuit, the method comprising a plurality of cycles, each cycle comprising:

depositing a silicon layer on a substrate in a process chamber by exposing the substrate to trisilane;

substantially removing the trisilane from the process chamber;

forming a silicon-containing compound layer by exposing the silicon layer to a reactive species; and

substantially removing the reactive species from the process chamber.

2. The method of claim 1, wherein the reaction chamber is a single substrate laminar flow reaction chamber.

3. The method of claim 1, wherein the reaction chamber is a batch reactor.

4. The method of claim 1, wherein depositing a silicon layer comprises chemical vapor deposition.

5. The method of claim 1, wherein depositing the silicon layer comprises forming more than one atomic layer of silicon.

6. The method of claim 1, wherein the reactive species comprises a nitrogen species and the silicon-containing compound layer comprises silicon nitride.

7. The method of claim 6, wherein the nitrogen species comprises ammonia.

8. The method of claim 6, wherein the, nitrogen species comprises nitrogen active species.

9. The method of claim 6, wherein the silicon nitride layer is more uniform than a silicon nitride layer of substantially similar thickness deposited by chemical vapor deposition with silane.

10. The method of claim 6, wherein the silicon nitride layer is formed over an interfacial layer.

11. The method of claim 10, wherein the interfacial layer comprises silicon oxynitride.

12. The method of claim 10, wherein the interfacial layer comprises silicon oxide.

14. The method of claim 10, wherein the interfacial layer is formed by a process comprising:

depositing a silicon layer on a substrate by exposing the substrate to trisilane; and

forming the interfacial layer by exposing the silicon layer to an oxygen species.

15. The method of claim 14, wherein the oxygen species comprises one or more oxidants selected from the group consisting of atomic oxygen, water, ozone, oxygen, nitric oxide, and nitrous oxide.

16. The method of claim 1, wherein the silicon-containing compound layer is formed over a hydrogen passivated substrate.

17. The method of claim 1, wherein substantially removing the trisilane comprises a removal process chosen from the group consisting of evacuating the process chamber and purging the process chamber with inert gas.

18. The method of claim 1, wherein substantially removing the reactive species comprises a removal process chosen from the group consisting of evacuating the reactive species and purging the process chamber with inert gas.

19. The method of claim 1, wherein the cycles are repeated until the silicon-containing compound layer has a thickness between about 3 Å

and 5000 Å

.

20. The method of claim 19, wherein the cycles are repeated until the thickness is between about 3 Å

and 400 Å

.

21. The method of claim 1, wherein the silicon-containing compound layer has a thickness non-uniformity of about 5% or less.

22. The method of claim 21, wherein the silicon-containing compound layer has a step coverage of about 80% or greater.

13. (canceled)

23-37. -37. (canceled)

38. A method of forming a layer, of an insulating silicon compound, having a desired thickness for an integrated circuit by performing multiple chemical vapor deposition cycles in a reaction chamber, each cycle comprising:

first, depositing a silicon layer on a substrate by exposing the substrate to a silicon source, wherein the silicon layer has a silicon layer thickness between about 3 Å and

25 Å

; and

second, reacting the silicon layer to partially form the layer of an insulating silicon compound, wherein a polysilane is the silicon source used to deposit a first silicon layer on the substrate in a first performance of a cycle of the plurality of cycles.

39. The method of claim 38, wherein reacting comprises nitriding and wherein the insulating silicon compound is silicon nitride.

40. The method of claim 39, wherein the layer of an insulating silicon compound has a stoichiometry of about 43 silicon atoms per 56 nitrogen atoms.

41. The method of claim 38, wherein reacting comprises oxidizing and wherein the insulating silicon compound is silicon oxide.

42. The method of claim 38, wherein trisilane is the silicon source used to deposit a first silicon layer on the substrate in a first performance of a cycle.

43. The method of claim 42, wherein the silicon source for depositing subsequent silicon layers after depositing the first silicon layer comprises a silicon compound selected from the group consisting of silanes having a silane chemical formula Si_nH₂₊₂, where n=1 to 4, and halosilanes having a halosilane chemical formula R₄₋

XSiH_X, where R=Cl, Br or I and X=0 to 3.

44. The method of claim 43, wherein all silicon layers deposited after the first silicon layer are formed with the same silicon source.

45. The method of claim 105, wherein a first substrate temperature for depositing the first silicon layer is less than about 525°

C.

46. The method of claim 45, wherein the first substrate temperature is less than about 475°

C.

47. The method of claim 46, wherein a second substrate temperature for reacting the first silicon layer is greater than the first substrate temperature.

48. The method of claim 47, wherein depositing and reacting are performed isothermally after reacting the first silicon layer.

49. The method of claim 48, wherein a third substrate temperature for depositing and reacting, after reacting the first silicon layer, is between about 400°

C. and 650°

C.

50. The method of claim 49, wherein the third substrate temperature is greater than about 525°

C.

51. The method of claim 47, further comprising evacuating the reaction chamber for at least about 10 seconds before reacting the first silicon layer.

52. The method of claim 47, wherein the first silicon layer has a first silicon layer thickness of about 8-12 Å

.

53. The method of claim 52, wherein a temperature and a duration for reacting are chosen to prevent reacting the substrate under the silicon layer.

54. The method of claim 52, wherein reacting the silicon layer comprises exposing the silicon layer to an atomic species.

55. The method of claim 54, wherein the atomic species is atomic nitrogen.

56. The method of claim 38, wherein the reaction chamber is a single substrate laminar flow reaction chamber.

57. The method of claim 38, wherein the reaction chamber is a batch reactor.

105. The method of claim 38, wherein a temperature for reacting is less than about 650°

C.

106. The method of claim 38, wherein a thickness of the first silicon layer on the substrate is about greater than or equal to a nitridation saturation depth.

58-104. -104. (canceled)