Memory device with sector pointer structure

• US 20050120266A1
• Filed: 12/09/2004
• Published: 06/02/2005
• Est. Priority Date: 02/06/2002
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Raul-Adrian Cernea
• Inventors: Cernea, Raul-Adrian
• Granted Patent: US 7,549,012 B2
• Time in Patent Office: Days
• US Class Current: 714/8
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 3/0614 Improving the reliability of storage systems
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 15/00 Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores

Abstract

A pointer structure on the storage unit of a non-volatile memory maintains a correspondence between the physical and logical address. The controller and storage unit transfer data on the basis of logical sector addresses with the conversion between the physical and logical addresses being performed on the storage unit. The pointer contains a correspondence between a logical sector address and the physical address of current data as well as maintaining one or more previous correspondences between the logical address and the physical addresses at which old data is stored. New and old data can be kept in parallel up to a certain point. When combined with background erase, performance is improved. In an exemplary embodiment, the pointer structure is one or more independent non-volatile sub-arrays, each with its own row decoder. Each pointer has a flag to indicate if it is active in addition to storing the current correspondence between a logical address and a physical address and one or more previous correspondences. When new data is written, it is written to an available, empty memory sector and the pointer is concurrently updated. Defective sectors can be removed from the pool of available sectors in a row redundancy scheme. A random, binary, or other search technique can be used to find the available erased sectors.

Claims

1. A non-volatile memory system comprising:

a controller for externally transferring data identified by logical sector addresses; and

a memory connected to the controller, comprising;

an array comprised of a plurality of sectors, wherein each sector contains a plurality of data storage elements and is identified by a physical address; and

a pointer structure storing correspondences between logical sector addresses and physical sector addresses, wherein the pointer structure concurrently maintains a first correspondence between a logical sector address and a first physical sector address at which currently valid data identified by the logical sector address is stored and a second correspondence between the logical sector address and a second distinct physical sector address at which previously valid data identified by the logical sector address has been stored.

2-38. -38. (canceled)