Method to maximize receiver performance in a multi-stream system

• US 20050123076A1
• Filed: 12/09/2003
• Published: 06/09/2005
• Est. Priority Date: 12/09/2003
• Status: Active Grant

• Current Assignee: Gula Consulting Limited Liability Company (Intellectual Ventures LLC)
• Original Assignee: Delphi Technologies, Inc. (BorgWarner Incorporated)
• Inventors: Dibiaso, Eric A., Walker, Glenn A., Dockemeyer, J. Robert Jr.
• Granted Patent: US 7,366,246 B2
• Time in Patent Office: Days
• US Class Current: 375/341
• CPC Class Codes: H04B 7/0857 using maximum ratio combining techniques, e.g. signal-to- interference ratio [SIR], received signal strenght indication [RSS]

Abstract

A receiver is disclosed. The receiver includes a channel decoder select circuit, a plurality of communication channels, at least one maximum ratio combiner circuit, and a forward error correction circuit. The plurality of communication channels receives wireless information from channel demodulators and are in communication with respective channel decoder circuits, which are in communication with the channel decoder select circuit. The at least one maximum ratio combiner circuit receives the wireless information from the plurality of communication channels. The output of the maximum ratio combiner is communicated to the forward error correction circuit, the output of which is communicated to the channel decoder select circuit. A pseudo bit error measurement feedback signal communicated to the maximum ratio combiner from one of the plurality of channel decoder circuits. A method for finding wireless satellite signals that minimizes errors in a receiver system is also disclosed. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Claims

1. A receiver, comprising:

a channel decoder select circuit;

a plurality of communication channels that receives wireless information from channel demodulators, said plurality of communication channels in communication with respective channel decoder circuits, said plurality of channel decoder circuits in communication with the channel decoder select circuit;

at least one maximum ratio combiner circuit that receives the wireless information from the plurality of communication channels, wherein the output of the maximum ratio combiner is communicated to a forward error correction circuit, the output of which is communicated to the channel decoder select circuit; and

a pseudo bit error measurement feedback signal communicated to the maximum ratio combiner from one of the plurality of channel decoder circuits.

2. The receiver according to claim 1, wherein the plurality of channel decoder circuits are forward error correction circuits.

3. The receiver according to claim 1, wherein the channel decoder select circuit is a forward error correction select circuit.

4. The receiver according to claim 3, wherein the output of the forward error correction select circuit is communicated to a source decoder that converts the wireless information to audio.

5. The receiver according to claim 1, wherein the wireless information is a satellite digital audio radio services signal and a terrestrial signal.

6. The receiver according to claim 1 further comprising a switch connected at the input of a first channel decoder circuit that switches between the output of the maximum ratio combiner circuit and the a first communication channel of the plurality of communication channels.

7. The receiver according to claim 6, further comprising a feedback signal communicated to the input of the first channel decoder circuit.

8. The receiver according to claim 7, wherein the feedback signal is an uncorrectable error detection signal from a Reed Solomon Decoder.

9. The receiver according to claim 1, wherein the pseudo bit error measurement signal is processed by the one of the plurality of channel decoder circuits, an encoder, a hard detection circuit, a pseudo bit error rate circuit, and a weighting algorithm.

14. The method according to claim 9 further comprising the step of providing a switch at the input of the first forward error correction circuit.

10. A receiver, comprising:

first and second wireless signals provided from respective first and second satellite channel demodulators;

a third wireless signal provided from a terrestrial channel demodulator;

first, second, and third pseudo bit error measurement signals corresponding to the first, second, and third wireless signals communicated to a maximum ratio combiner; and

a Reed-Solomon decoder that processes the output of the maximum ratio combiner.

11. The receiver according to claim 10, wherein the first, second, and third bit error measurement signals are processed by a convolutional decoder, convolutional encoder, and a pseudo bit error rate circuit.

12. The receiver according to claim 10, wherein the maximum ratio combiner includes a weighting algorithm executed by a multiplier.

15. The method according to claim 10 further comprising the step of switching between the output of the maximum ratio combiner and the at least a first signal.

13. A method for finding wireless satellite signals that minimizes errors in a receiver system, comprising the steps of:

providing a plurality of signals from a plurality of channel demodulators;

receiving the plurality of signals at an input of a maximum ratio combiner;

providing a signal output from the maximum ratio combiner such that the output of the maximum ratio combiner is communicatable with an input of a first forward error correction circuit;

receiving at least a first signal from the plurality of signals from a first communication channel of the plurality of channels at the an input of at least a second forward error correction circuit;

providing an output signal of the first forward error correction circuit and the at least a second forward error correction circuit to a forward error correction select circuit; and

providing a pseudo bit error measurement feedback signal communicated to the maximum ratio combiner from the second forward error correction circuit.