Microelectronic device signal transmission by way of a lid

• US 20050127489A1
• Filed: 12/10/2003
• Published: 06/16/2005
• Est. Priority Date: 12/10/2003
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Baldwin, Chris, Mallik, Debendra, Stone, Brent
• Application Number:
  US10/733,183
• Publication Number:
  US 20050127489A1
• Time in Patent Office: Days
• US Class Current: 257/686
• CPC Class Codes: H01L 2224/05571 the external layer being disposed in a recess of the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 23/04 characterised by the shape of the container or parts, e.g. caps, walls
• CPC Class Codes: H01L 23/36 Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks H01L23/28, H01L23/40, H01L23/42, H01L23/44, H01L23/46 take precedence; heating H01L23/345
• CPC Class Codes: H01L 23/492 Bases or plates or solder therefor
• CPC Class Codes: H01L 23/49833 the chip support structure consisting of a plurality of insulating substrates
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/00015 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1433 : Application-specific integrated circuit [ASIC]
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15165 : Monolayer substrate
• CPC Class Codes: H01L 2924/15192 : Resurf arrangement of the internal vias
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15331 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/19106 : in a mirrored arrangement on two different side of a common die mounting substrate

Abstract

A microelectronic device package including an electrically conductive lid having an attachment surface, a substrate having an attachment surface, at least one interconnect extending between the lid attachment surface and the substrate attachment surface, at least one microelectronic die disposed between the lid attachment surface and the substrate attachment surface, and the substrate having at least one first conductive trace extending between the electrically conductive first interconnect and the microelectronic die. The microelectronic device package allows for the use of the electrically conductive lid as a path for conducting signals (preferably power or ground) to and/or from a microelectronic die.

Claims

1. A microelectronic device package, comprising:

an electrically conductive lid having an attachment surface;

a substrate having an attachment surface;

at least one electrically conductive first interconnect extending between said lid attachment surface and said substrate attachment surface;

at least one microelectronic die disposed between said lid attachment surface and said substrate attachment surface; and

said substrate having at least one first conductive trace extending between said electrically conductive first interconnect and said microelectronic die.

2. The microelectronic device package of claim 1, further including a first signal line in electrical communication with said electrically conductive lid.

3. The microelectronic device package of claim 1, wherein said electrically conductive lid comprises thermally conductive heat dissipation device.

4. The microelectronic device package of claim 3, further comprising a thermal interface material disposed between said heat dissipation device and a back surface of said at least one microelectronic die.

5. The microelectronic device package of claim 1, further comprising:

a socket having a first surface, a second surface opposing said first surface; and

a recess extending into said socket from said socket first surface;

said substrate and said microelectronic die substantially residing in said socket recess; and

a portion of said lid extending proximate said socket first surface.

6. The microelectronic device package of claim 5, further including at least one first signal line extending from said socket second surface to said socket first surface, wherein said first signal trace is in electrical contact with said lid.

7. The microelectronic device package of claim 6, further including at least one external contact contacting said at least one first signal line proximate said socket second surface.

8. The microelectronic device package of claim 5, further including at least one second signal line extending from said socket second surface to said socket recess, wherein said second signal trace is in electrical contact with said substrate.

9. The microelectronic device package of claim 8, further including at least one external contact contacting said at least one second signal line proximate said socket second surface.

10. The microelectronic device package of claim 1, wherein said electrically conductive lid comprises dielectric lid having an electrically conductive signal trace proximate said lid attachment surface;

and further comprising at least one electrically conductive first interconnect contacting said electrically conductive signal trace.

11. The microelectronic device package of claim 1, further comprising:

an electrically conductive signal trace proximate said lid attachment surface and a dielectric layer disposed between said electrically conductive signal trace and said lid attachment surface;

at least one electrically conductive second interconnect extending between said at least one electrically conductive signal trace and said substrate; and

said substrate having at least one second conductive trace extending between said electrically conductive second interconnect and said microelectronic die.

12. The microelectronic device package of claim 11, further including a second signal line in electrical communication with said at least one electrically conductive signal trace.

13. The microelectronic device package of claim 11, wherein said electrically conductive lid comprises thermally conductive heat dissipation device.

14. The microelectronic device package of claim 13, further comprising a thermal interface material disposed between said heat dissipation device and a back surface of said at least one microelectronic die.

15. The microelectronic device package of claim 11, further comprising:

a socket having a first surface, a second surface opposing said first surface; and

a recess extending into said socket from said socket first surface;

said substrate and said microelectronic die substantially residing in said socket recess; and

a portion of said lid extending proximate said socket first surface.

16. The microelectronic device package of claim 15, further including at least one first signal line and at least one second signal line each extending from said socket second surface to said socket first surface, wherein said first signal trace is in electrical contact with said lid and wherein said third signal line is in electrical contact with said electrically conductive signal trace.

17. The microelectronic device package of claim 16, further including at least one external contact contacting said at least one first signal line proximate said socket second surface and at least one external contact contacting said at least one third signal line proximate said socket second surface.

18. The microelectronic device package of claim 15, further including at least one second signal line extending from said socket second surface to said socket recess, wherein said second signal trace is in electrical contact with said substrate.

19. The microelectronic device package of claim 18, further including at least one external contact contacting said at least one second signal line proximate said socket second surface.

20. An electronic system, comprising:

an external substrate within a housing; and

at least one microelectronic device package attached to said external substrate, including;

an electrically conductive lid having an attachment surface;

a substrate having an attachment surface;

at least one electrically conductive first interconnect extending between said lid attachment surface and said substrate attachment surface;

at least one microelectronic die disposed between said lid attachment surface and said substrate attachment surface; and

said substrate having at least one first conductive trace extending between said electrically conductive first interconnect and said microelectronic die; and

an input device interfaced with said external substrate; and

a display device interfaced with said external substrate.

21. The electronic system of claim 20, said microelectronic device package further including a first signal line in electrical communication with said electrically conductive lid.

22. The electronic system of claim 20, said microelectronic device package further comprising:

a socket having a first surface, a second surface opposing said first surface; and

a recess extending into said socket from said socket first surface;

said substrate and said microelectronic die substantially residing in said socket recess; and

a portion of said lid extending proximate said socket first surface.

23. The electronic system of claim 22, said microelectronic device package further including at least one first signal line extending from said socket second surface to said socket first surface, wherein said first signal trace is in electrical contact with said lid.

24. The electronic system of claim 23, said microelectronic device package further including at least one external contact contacting said at least one first signal line proximate said socket second surface.

25. The electronic system of claim 22, said microelectronic device package further including at least one second signal line extending from said socket second surface to said socket recess, wherein said second signal trace is in electrical contact with said substrate.

26. The electronic system of claim 25, said microelectronic device package further including at least one external contact contacting said at least one second signal line proximate said socket second surface.

27. The electronic system of claim 20, wherein said electrically conductive lid comprises dielectric lid having an electrically conductive signal trace proximate said lid attachment surface;

and further comprising at least one electrically conductive first interconnect contacting said electrically conductive signal trace.

28. The electronic system of claim 20, said microelectronic device package further comprising:

an electrically conductive signal trace proximate said lid attachment surface and a dielectric layer disposed between said electrically conductive signal trace and said lid attachment surface;

at least one electrically conductive second interconnect extending between said at least one electrically conductive signal trace and said substrate; and

said substrate having at least one second conductive trace extending between said electrically conductive second interconnect and said microelectronic die.

29. The electronic system of claim 28, said microelectronic device package further including a second signal line in electrical communication with said at least one electrically conductive signal trace.

30. The electronic system of claim 28, said microelectronic device package further comprising:

a socket having a first surface, a second surface opposing said first surface; and

a recess extending into said socket from said socket first surface;

said substrate and said microelectronic die substantially residing in said socket recess; and

a portion of said lid extending proximate said socket first surface.

31. The electronic system of claim 30, said microelectronic device package further including at least one first signal line and at least one second signal line each extending from said socket second surface to said socket first surface, wherein said first signal trace is in electrical contact with said lid and wherein said third signal line is in electrical contact with said electrically conductive signal trace.

32. The electronic system of claim 31, said microelectronic device package further including at least one external contact contacting said at least one first signal line proximate said socket second surface and at least one external contact contacting said at least one third signal line proximate said socket second surface.

33. The electronic system of claim 30, said microelectronic device package further including at least one second signal line extending from said socket second surface to said socket recess, wherein said second signal trace is in electrical contact with said substrate.

34. The electronic system of claim 33, said microelectronic device package further including at least one external contact contacting said at least one second signal line proximate said socket second surface.

35. A method of delivering at least one signal to a microelectronic die, comprising:

providing an electrically conductive lid having an attachment surface;

providing a substrate having an attachment surface;

disposing at least one electrically conductive first interconnect extending between said lid attachment surface and said substrate attachment surface;

disposing at least one microelectronic die between said lid attachment surface and said substrate attachment surface;

providing at least one first conductive trace extending between said electrically conductive first interconnect and said microelectronic die; and

delivering a signal to said electrically conductive lid.

36. The method of claim 35, wherein providing said electrically conductive lid comprises providing thermally conductive heat dissipation device.

37. The method of claim 36, further comprising disposing a thermal interface material between said heat dissipation device and a back surface of said at least one microelectronic die.

38. The method of claim 35, further comprising:

providing a socket having a first surface, a second surface opposing said first surface; and

a recess extending into said socket from said socket first surface; and

disposing said substrate and said microelectronic die substantially within said socket recess;

wherein a portion of said lid extends proximate said socket first surface.

39. The method of claim 38, further including providing at least one first signal line extending from said socket second surface to said socket first surface, wherein said first signal trace is in electrical contact with said lid.

40. The method of claim 39, further including providing at least one external contact contacting said at least one first signal line proximate said socket second surface.

41. The method of claim 39, further including providing at least one second signal line extending from said socket second surface to said socket recess, wherein said second signal trace is in electrical contact with said substrate.

42. The method of claim 41, further including providing at least one external contact contacting said at least one second signal line proximate said socket second surface.

43. The method of claim 35, wherein providing said electrically conductive lid comprises providing a dielectric lid having an electrically conductive signal trace proximate said lid attachment surface;

and further providing at least one electrically conductive first interconnect contacting said electrically conductive signal trace.

44. The method of claim 35, further comprising:

providing an electrically conductive signal trace proximate said lid attachment surface and a dielectric layer disposed between said electrically conductive signal trace and said lid attachment surface;

providing at least one electrically conductive second interconnect extending between said at least one electrically conductive signal trace and said substrate; and

providing said substrate having at least one second conductive trace extending between said electrically conductive second interconnect and said microelectronic die.

45. The method of claim 44, further including providing a second signal line in electrical communication with said at least one electrically conductive signal trace.

46. The method of claim 44, wherein said providing electrically conductive lid comprises providing thermally conductive heat dissipation device.

47. The method of claim 46, further comprising a thermal interface material disposed between said heat dissipation device and a back surface of said at least one microelectronic die.

48. The method of claim 46, further comprising:

a socket having a first surface, a second surface opposing said first surface; and

a recess extending into said socket from said socket first surface;

said substrate and said microelectronic die substantially residing in said recess; and

a portion of said lid extending proximate said socket first surface.

49. The method of claim 48, further including at least one first signal line and at least one second signal line each extending from said socket second surface to said socket first surface, wherein said first signal trace is in electrical contact with said lid and wherein said third signal line is in electrical contact with said electrically conductive signal trace.

50. The method of claim 49, further including at least one external contact contacting said at least one first signal line proximate said socket second surface and at least one external contact contacting said at least one third signal line proximate said socket second surface.

51. The method of claim 46, further including at least one second signal line extending from said socket second surface to said socket recess, wherein said second signal trace is in electrical contact with said substrate.

52. The method of claim 51, further including at least one external contact contacting said at least one second signal line proximate said socket second surface.