High-voltage vertical transistor with a multi-gradient drain doping profile

• US 20050133858A1
• Filed: 01/25/2005
• Published: 06/23/2005
• Est. Priority Date: 09/07/2001
• Status: Active Grant

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Banerjee, Sujit, Disney, Donald Ray
• Granted Patent: US 7,221,011 B2
• Time in Patent Office: Days
• US Class Current: 257/327
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7824 with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
• CPC Class Codes: H01L 29/7825 with trench gate electrode trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7828 without inversion channel, e.g. vertical ACCUFETs, normally-on vertical MISFETs
• CPC Class Codes: Y10S 438/925 Fluid growth doping control, e.g. delta doping

Abstract

A high-voltage transistor includes first and second trenches that define a mesa in a semiconductor substrate. First and second field plate members are respectively disposed in the first and second trenches, with each of the first and second field plate members being separated from the mesa by a dielectric layer. The mesa includes a plurality of sections, each section having a substantially constant doping concentration gradient, the gradient of one section being at least 10% greater than the gradient of another section. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Claims

1. A high-voltage transistor comprising:

a drain region of a first conductivity type;

a source region of the first conductivity type;

a body region of a second conductivity type opposite to the first conductivity type, the body region adjoining the source region;

a drift region of the first conductivity type extending in a first direction from the drain region to the body region, the drift region comprising first and second sections having substantially different first and second doping concentration gradients, respectively;

first and second field plate members respectively disposed on opposite sides of the drift region, the first and second field plate members being fully insulated from the drift region; and

an insulated gate disposed adjacent the body region.

2. The high-voltage transistor according to claim 1 wherein the first and second doping concentration gradients differ by at least 10%.

3. The high-voltage transistor according to claim 1 wherein the high-voltage transistor is fabricated on a semiconductor substrate having a planar bottom surface, and the first direction is oriented perpendicular to the planar bottom surface.

4. The high-voltage transistor according to claim 1 wherein the first conductivity type comprises n-type and the second conductivity type comprises p-type.

5. The high-voltage transistor according to claim 1 wherein the drift region has a length oriented in the first direction and a width oriented in a second direction orthogonal to the first direction, the length being more than five times the width.

6. The high-voltage transistor according to claim 1 wherein the first section is located nearest the body region and the second section is located nearest the drain region.

7. The high-voltage transistor according to claim 6 wherein the first doping concentration gradient is less than the second doping concentration gradient.

8. The high-voltage transistor according to claim 1 wherein the first and second field plate members are each insulated from the drift region by a dielectric layer.

9. The high-voltage transistor according to claim 8 wherein the drift region and the dielectric layer each have a width in a second direction orthogonal to the first direction, the width of the dielectric layer being greater than the width of the drift region.

10. A high-voltage transistor comprising:

a drain of a first conductivity type;

a source of the first conductivity type;

a drift region of the first conductivity type extending in a first direction from the drain to the source, and comprising first and second sections having substantially different first and second doping concentration gradients, respectively; and

first and second field plate members respectively disposed on opposite sides of the drift region, each of the field plate members being insulated from the drift region by a dielectric layer.

11. The high-voltage transistor according to claim 10 wherein the first and second doping concentration gradients differ by at least 10%.

12. The high-voltage transistor according to claim 10 wherein the high-voltage transistor is fabricated on a semiconductor substrate having a planar bottom surface, the first direction being oriented perpendicular to the planar bottom surface.

13. The high-voltage transistor according to claim 10 wherein the first conductivity type comprises n-type.

14. The high-voltage transistor according to claim 10 wherein the drift region has a length oriented in the first direction and a width oriented in a second direction orthogonal to the first direction, the length being more than five times the width.

15. The high-voltage transistor according to claim 10 wherein the field plate members are oriented parallel to the drift region.

16. The high-voltage transistor according to claim 10 wherein the first section is located nearest the body region and the second section is located nearest the drain region.

17. The high-voltage transistor according to claim 16 wherein the first doping concentration gradient is less than the second doping concentration gradient.

18. A high-voltage transistor comprising:

a substrate;

first and second trenches in the substrate that define a mesa;

first and second field plate members respectively disposed in the first and second trenches, each of the first and second field plate members being separated from the mesa by a dielectric layer; and

wherein the mesa comprises a plurality of sections, each section having a substantially constant doping concentration gradient, an uppermost section having a doping concentration gradient that is at least 10% greater than a doping concentration gradient of a lowermost section.

19. The high-voltage transistor according to claim 18 wherein the plurality of sections are adjoined in a stack, with each successive section in the stack having a larger doping concentration gradient than a preceding section.

20. A high-voltage transistor comprising:

a substrate;

first and second trenches in the substrate that define a mesa, the mesa having a doping concentration gradient that varies in a substantially continuous manner in a vertical direction through the mesa; and

first and second field plate members respectively disposed in the first and second trenches, each of the first and second field plate members being separated from the mesa by a dielectric layer.

21. The high-voltage transistor according to claim 20 wherein the doping concentration gradient increases from near a top of the mesa to near a bottom of the mesa.

22. The high-voltage transistor according to claim 21 wherein the doping concentration gradient differs by at least 10% from near the top to near the bottom of the mesa.