Electronically programmable antifuse and circuits made therewith

• US 20050133884A1
• Filed: 02/04/2005
• Published: 06/23/2005
• Est. Priority Date: 10/06/2003
• Status: Active Grant

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Abadeer, Wagdi W., Fifield, John A., Tonti, William R.
• Granted Patent: US 7,215,002 B2
• Time in Patent Office: Days
• US Class Current: 257/530
• CPC Class Codes: H01L 23/5252 comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

An antifuse device (120) that includes a bias element (124) and an programmable antifuse element (128) arranged in series with one another so as to form a voltage divider having an output node (F) located between the bias and antifuse elements. When the antifuse device is in its unprogrammed state, each of the bias element and antifuse element is non-conductive. When the antifuse device is in its programmed state, the bias element remains non-conductive, but the antifuse element is conductive. The difference in the resistance of the antifuse element between its unprogrammed state and programmed state causes the difference in voltages seen at the output node to be on the order of hundreds of mili-volts when a voltage of 1 V is applied across the antifuse device. This voltage difference is so high that it can be readily sensed using a simple sensing circuit (228).

Claims

1-14. -14. (canceled)

15. An antifuse device having an unprogrammed state and a programmed state, comprising:

(a) a bias element;

(b) a programmable antifuse element; and

(c) an output node electrically coupled between said bias element and said antifuse element so that said antifuse device forms a voltage divider;

wherein;

(a) when the antifuse device is in the unprogrammed state said bias element is operatively configured to be essentially non-conductive, and said programmable antifuse element is operatively configured to be essentially non-conductive; and

(b) when the antifuse device is in the programmed state said bias element is operatively configured to be essentially non-conductive, and said programmable antifuse element is operatively configured to be conductive thereacross.

16. An antifuse device according to claim 15, wherein each one of said bias and antifuse elements is a thin-oxide device.

17. An antifuse device according to claim 15, further comprising a sensing circuit, in electrical communication with said output node, operatively configured to sense the unprogrammed and programmed states of the antifuse device.

18. An antifuse device according to claim 17, wherein said sensing circuit is a latchless circuit.

19. An antifuse device according to claim 17, wherein said sensing circuit consists essentially of an inverter.

20. An antifuse device according to claim 15, further comprising a programming circuit in electrical communication with said programmable antifuse element and operatively configured to cause said programmable antifuse element to become conductive with said programming circuit is energized.

21-30. -30. (canceled)

31. An antifuse element comprising:

(a) a first conductive region;

(b) a second conductive region; and

(c) a tunneling region located between said first and second conductive regions, said tunneling region being operatively configured so that a tunneling current is present between said first and second conductive regions when a first voltage is applied across the antifuse element.

34. An antifuse element according to claim 31, wherein said antifuse element has an unprogrammed state and a programmed state, wherein in said unprogrammed state said tunneling region is essentially non-conducting when said first voltage is applied across the antifuse element and in said programmed state said tunneling region is conducting when a second voltage is applied across the antifuse element.

35. An antifuse element according to claim 34, wherein said first and second voltages are the same voltage.

36. An antifuse element according to claim 34, further comprising a programming circuit operatively configured for changing said unprogrammed state to said programmed state.

37. An antifuse element according to claim 36, wherein said programming circuit implements a programming voltage to change said unprogrammed state to said programmed state.

40. A method according to claim 36, wherein said tunneling region of said first element has a first thickness and said tunneling region of said second element has a second thickness.

41. A method according to claim 37, further comprising:

(a) adjusting the ratio of said first thickness to said second thickness to adjust the voltage at the output node.

42. A method according to claim 36, further comprising:

(a) applying a programming voltage across the antifuse device, said programming voltage being of a magnitude sufficient to cause a dielectric breakdown within at least one of said tunneling region of said first and second elements.

38. An antifuse device operable at a voltage thereacross, comprising:

(a) a first element having a first conductive region, a second conductive region and a tunneling region located between said first and second conductive regions, said tunneling region operatively configured so that in an unprogrammed state a tunneling current is present between said first and second conductive regions of said first element when the voltage is applied across the antifuse device, and that in a programmed state said tunneling region is conductive between said first and second conductive regions when the voltage is applied across the antifuse device;

(b) a second element having a first conductive region, a second conductive region and a tunneling region located between said first and second conductive regions, said tunneling region operatively configured so that in an unprogrammed state a tunneling current is present between said first and second conductive regions of said second element when the voltage is applied across the antifuse device, and that in a programmed state said tunneling region is conductive between said first and second conductive regions when the voltage is applied across the antifuse device; and

(c) an output node electrically coupled between said first element and said second element.

39. A method of establishing a voltage at an output node of an antifuse device, the method comprising:

(a) providing a first element having a first conductive region, a second conductive region and a tunneling region located between said first and second conductive regions of said first element;

(b) providing a second element having a first conductive region, a second conductive region and a tunneling region located between said first and second conductive regions of said second element;

(c) coupling the output node between said first element and said second element; and

(d) applying a voltage across the antifuse device such that a tunneling current is present between said first and second conductive regions of said first and second elements.

43. A method according to claim 39, further comprising:

(a) allowing a programmed current to flow through the antifuse device.