Multiple chip package module having inverted package stacked over die

• US 20050133916A1
• Filed: 12/16/2004
• Published: 06/23/2005
• Est. Priority Date: 12/17/2003
• Status: Active Grant

• Current Assignee: Stats Chippac Pte. Ltd. (JCET Group Co., Ltd.)
• Original Assignee: Stats Chippac Incorporated (JCET Group Co., Ltd.)
• Inventors: Karnezos, Marcos
• Granted Patent: US 8,970,049 B2
• Time in Patent Office: Days
• US Class Current: 257/738
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73215 Layer and wire connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2225/0651 Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06575 Auxiliary carrier between devices, the carrier having no electrical connection structure
• CPC Class Codes: H01L 2225/06582 Housing for the assembly, e.g. chip scale package [CSP]
• CPC Class Codes: H01L 2225/1023 the support being an insulating substrate
• CPC Class Codes: H01L 2225/1052 Wire or wire-like electrical connections
• CPC Class Codes: H01L 2225/1058 Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/03 : all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

A module having multiple die includes a first die on a first substrate and an inverted second package (such as a land grid array package) stacked over the first die, with, where necessary, provision (such as by a spacer) is made for a standoff between the second package and the first die. Also, methods for making the module include steps of providing a first package having a first die attached onto an upward facing side of a first package substrate, and stacking an inverted second package over the die on the first package, provision being made where necessary for a standoff between the second package and the first package die to avoid damaging impact between the downward-facing side of the second package and wire bonds connecting the first die to the first package substrate. Also, devices such as computers and consumer electronics devices and portable or mobile devices such as mobile telecommunications devices, containing the module of the invention.

Claims

2. A multiple chip module, comprising stacked first and second packages, each package including a die attached to a substrate, in which the upper package is inverted, and in which the upper package is stacked over a die on the lower package with provision for spacing between the upper package and the lower package die.

3. A multi-package module comprising stacked first and second packages, the first package being a BGA package having a die attached to a substrate and the second package including a die attached to a substrate, wherein the second package is inverted so that the substrate surface to which its die is attached is downward-facing, and in which the inverted package is affixed over the first package die, with provision for spacing between the first package die and the inverted second package.

1. A multiple chip package module comprising an inverted package stacked over a die.

4. The multi-chip module of claim 3 wherein the second package is an LGA package.

5. The multi-chip module of claim 3 wherein the second package is a saw-singulated package.

6. The multi-chip module of claim 3 wherein the second package is a chip scale package.

7. The multi-chip module of claim 3 wherein the second package has a tape-based package substrate.

8. The multi-chip module of claim 3 wherein the second package is a bump chip carrier package.

17. The module of claim 3 wherein the connection of the second package die and the second package substrate is by flip chip or wire bond interconnection.

18. The module of claim 3 wherein the inverted second package comprises a laminate substrate LGA.

19. The module of claim 3 wherein the inverted second package comprises a tape-based LGA.

20. The module of claim 3 wherein the inverted second package comprises a QFN package.

21. The module of claim 3 wherein the inverted second package comprises a BCC package.

22. The module of claim 3 wherein the inverted second package comprises at least one die.

23. The module of claim 22 wherein the inverted second package comprises a plurality of die.

24. The module of claim 22 wherein the inverted second package comprises a plurality of stacked die.

25. The module of claim 3 wherein the first package comprises a plurality of die.

26. The module of claim 3 wherein the first package comprises a plurality of stacked die, and wherein inverted second package is mounted over an uppermost one of the stacked die.

27. The module of claim 3 wherein the first package comprises a flip chip die bonded to the first substrate.

28. The module of claim 3 wherein the first package comprises a flip chip die bonded to the second substrate.

29. The module of claim 3, further comprising a heat spreader over the second package.

30. The module of claim 3, comprising a laminate substrate.

31. The module of claim 3, comprising a build-up substrate.

32. The module of claim 3, comprising a flexible substrate.

33. The module of claim 3, comprising a ceramic substrate.

34. The module of claim 3, further comprising an additional package mounted over the inverted second package.

35. The module of claim 34 wherein the additional LGA package is wire bonded to the inverted second package substrate.

36. The module of claim 34 wherein the additional LGA package is wire bonded to the first package substrate.

37. The module of claim 3, further comprising an additional die mounted over the inverted second package.

38. The module of claim 37 wherein the additional die is wire-bonded to the upper package substrate.

39. The module of claim 37 wherein the additional die is wire-bonded to the lower package substrate.

40. The module of claim 3, further comprising a heat spreader.

41. The module of claim 3 wherein the heat spreader is affixed to an upward facing surface of a topmost package.

42. The module of claim 3 wherein the heat spreader is affixed to an upward facing surface of an additional die on the second package.

43. The module of claim 3 wherein the inverted second package is the uppermost package in the module, and wherein the heat spreader is affixed to an upward facing side of the inverted second package.

44. The module of claim 3 wherein the heat spreader is molded in at the topmost surface of the module.

45. The module of claim 3 wherein an electrically nonconductive heat-conducting molding is employed for a module encapsulation.

9. A multiple chip module, comprising a second package inverted and stacked over a die on a first package.

10. The module of claim 9 wherein the first package comprises a BGA package.

11. The module of claim 9 wherein the first package includes at least one die mounted on a substrate.

12. The module of claim 9 wherein the first package die is connected to a first package substrate by wire bonds, and wherein a spacer is affixed onto the upward facing side of the die, and wherein the inverted package is affixed onto the upward facing side of the spacer.

13. The module of claim 9 wherein z-interconnection between the inverted package and the first package is wire bond based.

14. The module of claim 13 wherein wire bonds connect z-interconnect wire bond pads on an upward facing side of the inverted second package with pads on the lower package die.

15. The module of claim 13 wherein wire bonds connect z-interconnect wire bond pads on an upward facing side of the inverted second package with z-interconnect wire bond pads on the upward-facing side of the first package substrate.

16. The module of claim 13 wherein wire bonds connect z-interconnect wire bond pads on an upward facing side of the inverted second package with z-interconnect wire bond pads on the upward-facing side of the first package substrate, and wherein wire bonds connect z-interconnect wire bond pads on an upward facing side of the inverted second package with pads on the lower package die.

24-1. The module of claim 3 wherein the first package comprises at least one die.

46. A method for making a multiple chip package modules having an inverted package stacked over a die, comprising providing a first package having a first die attached onto an upward facing side of a first package substrate, and stacking an inverted second package over the die on the first package, provision being made for a standoff between the second package and the first package die to avoid damaging impact between the downward-facing side of the second package and wire bonds connecting the first die to the first package substrate.

47. A method for making a multiple chip package modules having an inverted package stacked over a die, comprising attaching a first die to a first substrate, wire bonding the first die to the first substrate, affixing a spacer over the first die, affixing an inverted upper package over the spacer, performing a first plasma clean to prepare wire bond sites for z-interconnect wire bonding, carrying out z-interconnect wire bonding, performing a second plasma clean to prepare surfaces for good adhesion of a molding, introducing and curing the molding, and attaching solder balls.

48. The method of claim 47, further comprising, following the z-interconnecting, dispensing an adhesive on an upward facing side of the second package, placing a heat spreader onto the adhesive, and curing the adhesive.

49. The method of claim 47, further comprising, following the z-interconnecting, placing a heat spreader into a mold cavity, placing the assembled inverted package affixed over the first die over the heat spreader in the cavity, introducing a molding compound into the cavity, and curing the molding compound.

50. A computer containing a multiple chip package module a having an inverted package stacked over a die.

51. A portable electronic apparatus containing a multiple chip package module having an inverted package stacked over a die.

52. A mobile telecommunications device containing a multiple chip package module having an inverted package stacked over a die.