Dynamic compensation of analog-to-digital converter (ADC) offset errors using filtered PWM

• US 20050134488A1
• Filed: 12/17/2003
• Published: 06/23/2005
• Est. Priority Date: 12/17/2003
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Alter, David Michael
• Granted Patent: US 7,242,330 B2
• Time in Patent Office: Days
• US Class Current: 341/118
• CPC Class Codes: H03M 1/0607 Offset or drift compensation removal of offset already present on the analogue input signal H03M1/1295

Abstract

A system and method of dynamic offset compensation that is particularly adaptable to analog-to-digital conversion performed in control applications employing highly integrated Digital Signal Processor (DSP) devices. The system providing dynamic compensation of Analog-to-Digital Converter (ADC) zero level offset errors includes an integrated DSP device with a multi-bit ADC and a PWM waveform generator for producing at least one PWM output, and an external low pass filter. The ADC receives an analog input signal and converts it into a corresponding digital output signal. The DSP device measures the zero level offset of the ADC output signal, and dynamically controls characteristics of the PWM output based on the measured offset. The low pass filter receives the PWM output and applies a corresponding controlled DC output voltage to the low reference voltage input of the ADC to dynamically compensate for the zero level offset error.

Claims

1. A system for providing dynamic compensation of analog-to-digital converter offset errors, comprising:

an Analog-to-Digital Converter (ADC) having an analog input, a digital output, and at least one reference voltage input;

a waveform generator operative to produce at least one output signal having Pulse-Width Modulated (PWM) waveform characteristics, the output signal having at least one predetermined PWM waveform characteristic;

a low pass filter configured to receive the output signal having PWM waveform characteristics, to produce a corresponding DC output signal, and to provide the DC output signal to the reference voltage input of the ADC; and

a processor operative to detect a voltage offset at the ADC digital output, and to control the predetermined characteristic of the output signal based on the detected offset, thereby dynamically compensating for ADC offset errors.

2. The system of claim 1 wherein the at least one predetermined characteristic of the output signal is a pulse width.

3. The system of claim 1 wherein the output signal produced by the waveform generator is unipolar.

4. The system of claim 1 wherein the output signal produced by the waveform generator is bipolar.

5. The system of claim 4 wherein the waveform generator includes a comparator configured to produce the bipolar output signal.

6. The system of claim 5 wherein the comparator has a threshold voltage input, the comparator being configured to receive a first output signal, to produce the corresponding bipolar output signal based on a threshold voltage level applied to the threshold voltage input, and to provide the bipolar output signal to the low pass filter.

7. The system of claim 6 wherein the comparator is configured to produce a bipolar PWM output signal having PWM waveform characteristics of greater than or equal to 50% duty cycle, and wherein the low pass filter is configured to receive the bipolar PWM output signal, to produce a corresponding positive DC output signal, and to provide the positive DC output signal to the reference voltage input of the ADC, thereby compensating for positive ADC offset errors.

8. The system of claim 6 wherein the comparator is configured to produce a bipolar PWM output signal having PWM waveform characteristics of less than 50% duty cycle, and wherein the low pass filter is configured to receive the bipolar PWM output signal, to produce a corresponding negative DC output signal, and to provide the negative DC output signal to the reference voltage input of the ADC, thereby compensating for negative ADC offset errors.

9. The system of claim 4 wherein the waveform generator includes an op amp voltage adder configured to produce the bipolar output signal.

10. The system of claim 1 wherein the processor, the waveform generator, and the ADC are incorporated within a programmable digital signal processing device.

11. A method of providing dynamic compensation of analog-to-digital converter offset errors, comprising the steps of:

providing an Analog-to-Digital Converter (ADC) having an analog input, a digital output, and at least one reference voltage input;

producing at least one output signal having Pulse-Width Modulated (PWM) waveform characteristics, the output signal having at least one predetermined PWM waveform characteristic;

filtering the output signal having PWM waveform characteristics by a low pass filter to produce a corresponding DC output signal;

providing the DC output signal to the reference voltage input of the ADC;

detecting a voltage offset at the ADC digital output by a processor; and

controlling the predetermined characteristic of the output signal based on the detected offset, thereby dynamically compensating for ADC offset errors.

12. The method of claim 11 wherein the at least one predetermined characteristic of the output signal is a pulse width.

13. The method of claim 11 wherein the output signal produced by the waveform generator is unipolar.

14. The method of claim 11 wherein the output signal produced by the waveform generator is bipolar.

15. The method of claim 14 further including the steps of providing a comparator having a threshold voltage input, receiving the output signal having PWM waveform characteristics by the comparator, producing the corresponding bipolar output signal based on a threshold voltage level applied to the threshold voltage input by the comparator, and providing the bipolar output signal to the low pass filter.

16. The method of claim 15 further including the steps of producing a positive output signal having PWM waveform characteristics based on the threshold voltage level applied to the threshold voltage input by the comparator, receiving the positive output signal by the low pass filter, producing a corresponding positive DC output signal by the low pass filter, and providing the positive DC output signal to the reference voltage input of the ADC, thereby compensating for positive ADC offset errors.

17. The method of claim 15 further including the steps of producing a negative output signal having PWM waveform characteristics based on the threshold voltage level applied to the threshold voltage input by the comparator, receiving the negative output signal by the low pass filter, producing a corresponding negative DC output signal by the low pass filter, and providing the negative DC output signal to the reference voltage input of the ADC, thereby compensating for negative ADC offset errors.

18. The method of claim 14 further including the steps of receiving the output signal having PWM waveform characteristics by an op amp voltage adder, and producing the corresponding bipolar output signal by the op amp voltage adder.

19. The method of claim 18 further including the step of filtering the output signal having PWM waveform characteristics by a low pass filter

20. The method of claim 11 further including the step of incorporating the processor, the waveform generator, and the ADC within a programmable digital signal processing device.