Method and apparatus for characterizing and/or predicting display backlight response latency

• US 20050134547A1
• Filed: 12/22/2003
• Published: 06/23/2005
• Est. Priority Date: 12/22/2003
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Wyatt, David A.
• Granted Patent: US 7,477,228 B2
• Time in Patent Office: Days
• US Class Current: 345/102
• CPC Class Codes: G09G 2320/0626 for control of overall brightness
• CPC Class Codes: G09G 2320/0646 Modulation of illumination source brightness and image signal correlated to each other
• CPC Class Codes: G09G 2320/066 for control of contrast
• CPC Class Codes: G09G 2320/0673 for control of gamma adjustment, e.g. selecting another gamma curve
• CPC Class Codes: G09G 2360/144 the light being ambient light
• CPC Class Codes: G09G 2360/145 the light originating from the display screen
• CPC Class Codes: G09G 2370/045 using multiple communication channels, e.g. parallel and serial
• CPC Class Codes: G09G 3/3406 Control of illumination source illumination devices structurally associated with liquid crystal cells G02F1/1336
• CPC Class Codes: G09G 5/36 characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory

Abstract

An approach to controlling an electronic system display includes determining a latency associated with changing a backlight brightness from a first level to a second level, and based on the determined latency, providing the latency predictions to a coordinating entity, which adjusts the backlight brightness and image luminance to occur in such a manner so as to substantially avoid associated visually disturbing artifacts which would otherwise occur if the two actions were applied asynchronously.

Claims

1. A method comprising:

determining a latency associated with changing a backlight brightness from a first level to a second level; and

based on the determined latency, coordinating adjustments to the backlight brightness and image luminance to occur in such a manner so as to substantially avoid associated visually disturbing artifacts.

2. The method of claim 1 further comprising:

coordinating the adjustments to the backlight brightness and image luminance with at least one of a vertical refresh and a scanline interval rate.

3. The method of claim 2 wherein coordinating the adjustments with at least one of the vertical refresh and the scanline interval rate includes dividing the latency by a vertical refresh and scanline period.

4. The method of claim 3 wherein coordinating the adjustments with the vertical refresh rate includes

if the latency is less than one half the vertical refresh period, initiating changing the image luminance and setting the backlight brightness at the second level prior to the beginning of a following vertical refresh;

if the latency is approximately one half of the vertical refresh period, if a current scanline is less than mid-way through a screen refresh, initiating setting the backlight brightness at the second level at a mid-point scanline of the screen refresh and initiating setting the image luminance prior to the beginning of a following vertical blanking interval;

if the latency is approximately equal to the time of one vertical period, initiating setting the backlight brightness at the second level at the beginning of a vertical blanking interval, and initiating setting the image luminance at the next vertical blanking interval; and

if the latency is greater than one vertical refresh period, initiating setting the backlight brightness at the second level, and initiating setting the image luminance at the vertical blanking interval associated with the refresh period closest to the latency.

5. The method of claim 1 wherein determining the latency includes

accessing first and second stored data points indicating a latency associated with changing the backlight from a third level to a fourth level, and

interpolating between the first and second data points.

6. The method of claim 5 wherein accessing first and second stored data points includes accessing a video memory.

7. A method comprising:

accessing data indicating latencies associated with changing a display backlight brightness; and

based on first and second data points of the data, determining a latency associated with adjusting the backlight from a first brightness level to a second brightness level.

8. The method of claim 7 wherein determining includes interpolating between the first and second data points.

9. The method of claim 7 further comprising

based on the latency, coordinating the adjustment of the backlight from the first brightness level to the second brightness level with an adjustment to image luminance such that the adjustments to the backlight and image luminance occur at substantially a same time.

10. The method of claim 9 wherein coordinating the backlight and image luminance adjustments includes coordinating with a vertical refresh period associated with refreshing the display.

11. A method comprising:

applying an input signal to change a display backlight brightness from a first level to a target level;

sensing the backlight brightness; and

logging a latency associated with changing the backlight brightness from the first level to a second level, the second level being one of the target level and an intermediate level between the first level and the target level.

12. The method of claim 11 further comprising

storing the logged latency in a memory of a system including the display.

13. The method of claim 11 further comprising

setting pixels of the display at a substantially highest transmissivity setting.

14. The method of claim 13 further comprising

performing the applying, sensing and logging actions with the pixels set at the highest transmissivity setting;

setting the pixels at a midrange transmissivity setting and performing the applying, sensing and logging actions a second time; and

comparing latencies associated with the highest and midrange transmissivity settings.

15. The method of claim 11 wherein the input signal is a substantially step input signal.

16. An apparatus comprising:

a memory to store first and second data points indicating first and second latencies associated with changing a display backlight brightness;

an interpolator to interpolate between the first and second data points to determine a third latency associated with a changing a backlight brightness from a first backlight brightness to a second backlight brightness; and

a coordinator to coordinate changing the backlight brightness from the first backlight brightness to the second backlight brightness with changing an image luminance based on the third latency.

17. The apparatus of claim 16 further comprising a timing generator to control a display vertical refresh rate, the coordinator further to coordinate changes to the backlight brightness and image luminance with the vertical refresh rate.

18. The apparatus of claim 16 wherein the memory is a non-volatile memory on a system including the display.

19. A system comprising:

a bus to communicate information;

a processor coupled to the bus;

a display coupled to the bus;

an antenna coupled to the bus; and

at least a first memory to store information that when accessed by the system causes the system to

access first and second data points indicating first and second latencies associated with changing backlight brightness of the display between associated levels;

determine based on the first and second data points a third latency associated with changing the backlight brightness from a first brightness to a second brightness; and

coordinate adjusting the backlight with a corresponding adjustment to image luminance.

20. The system of claim 19 wherein the display uses a backlight comprising one of cold-cathode fluorescent lamp(s) (CCFL), Electroluminescence Panels (ELP), incandescent lamps, and white light emitting diode (LED) elements.

21. The system of claim 19 wherein the memory further stores information that when accessed by the system causes the system to coordinate adjusting the backlight and image luminance with a vertical refresh and scanline interval rate.

22. The system of claim 21 wherein the memory includes a video basic input/output system (BIOS) table to store the data points and a mass storage device to store the instructions to access, determine and coordinate.

23. An apparatus comprising:

a backlight; and

pixels responsive to image an luminance setting to determine a transmissivity of the pixels,

an adjustment to a brightness of the backlight and an associated adjustment to image luminance to be coordinated to occur at substantially a same time.

24. The apparatus of claim 23 wherein the backlight and pixels are part of a display, and wherein adjustments to the backlight brightness and the image luminance are further coordinated with a vertical refresh period for the display.

25. A machine-accessible medium storing information that, when accessed by a computing system, causes the computing system to:

determine a latency associated with changing a backlight brightness from a first level to a second level; and

based on the determined latency, coordinate adjustments to the backlight brightness and image luminance to occur in such a manner so as to substantially avoid associated visually disturbing artifacts.

26. The machine-accessible medium of claim 25 further storing information that, when accessed by the computing system, causes the computing system to:

coordinate the adjustments to the backlight brightness and image luminance with a vertical refresh rate.

27. The machine-accessible medium of claim 26 wherein coordinating the adjustments with the vertical refresh rate includes dividing the latency by a vertical refresh period.

28. The machine-accessible medium of claim 27 wherein coordinating the adjustments with the vertical refresh rate includes

if the latency is less than one half the vertical refresh period, initiating changing the image luminance and setting the backlight brightness at the second level prior to the beginning of a following vertical blanking interval;

if the latency is approximately one half of the vertical refresh period, if a current scanline is less than mid-way through a screen refresh, initiating setting the backlight brightness at the second level at a mid-point of the screen refresh and initiating setting the image luminance at a vertical blanking interval;

if the latency is approximately equal to the time of one vertical period, initiating setting the backlight brightness at the second level at the beginning of a vertical blanking interval, and initiating setting the image luminance at the next vertical blanking interval; and

if the latency is greater than one vertical refresh period, initiating setting the backlight brightness at the second level, and initiating setting the image luminance at the vertical blanking interval associated with the refresh period(s) closest to the latency.

29. The machine-accessible medium of claim 25 wherein determining the latency includes

accessing first and second stored data points indicating a latency associated with changing the backlight from a third level to a fourth level, and

interpolating between the first and second data points.

30. The machine-accessible medium of claim 29 wherein accessing first and second stored data points includes accessing a video memory.