Apparatus and method of performing AES Rijndael algorithm

• US 20050135607A1
• Filed: 12/01/2004
• Published: 06/23/2005
• Est. Priority Date: 12/01/2003
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lee, Kyung-hee, Korkishko, Tymur, Lim, Chae-hoon
• Granted Patent: US 7,639,797 B2
• Time in Patent Office: Days
• US Class Current: 380/28
• CPC Class Codes: H04L 2209/125 Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations
• CPC Class Codes: H04L 9/0631 Substitution permutation network [SPN], i.e. cipher composed of a number of stages or rounds each involving linear and nonlinear transformations, e.g. AES algorithms

Abstract

An encryption and decryption apparatus includes a round key generator generating at least one round key for iterative operations in each of a plurality of rounds using an input key for one of the encryption and decryption; an initial round key adder receiving a plurality of divided parts of an input data, consecutively receiving a plurality of parts of an initial round key which is output from the round key generator for an initial round and corresponds to each of the divided input data, and adding the input data and the corresponding part of the initial round key; a first operator receiving a first data which is output from the initial round key adder and a part of the round key which is output from the round key generator and performing operations for one of the encryption and decryption; a second operator receiving a second data which is output from the initial round key adder and another part of the round key which is output from the round key generator, and performing operations for one of the encryption and decryption; and a register part temporarily storing the first data which is output from the first operator and the second data which is output from the second operator, inputting the first and second data to the first and second operators, respectively, for operations of a next round among the plurality of the rounds, and outputting an encrypted or decrypted data when the plurality of the rounds are completed.

Claims

1. An encryption and decryption apparatus, comprising:

a round key generator generating at least one round key for iterative operations in each of a plurality of rounds using an input key for one of the encryption or decryption;

an initial round key adder receiving a plurality of divided parts of an input data, consecutively receiving a plurality of parts of the at least one round key which is output from the round key generator for an initial round and corresponds to each of the divided parts of the input data, and adding the divided parts of the input data and the corresponding part of the at least one round key;

a first operator receiving a first data which is output from the initial round key adder and a second part of the at least one round key which is output from the round key generator and performing operations for the one of the encryption or decryption;

a second operator receiving a second data which is output from the initial round key adder and a third part of the round key which is output from the round key generator, and performing operations for the one of the encryption or decryption; and

a register part temporarily storing the first data which is output from the first operator and the second data which is output from the second operator, inputting the first and second data to the first and second operators, respectively, for operations of a next round among the plurality of the rounds, and outputting an encrypted or decrypted data when the plurality of the rounds are completed.

2. The encryption and decryption apparatus of claim 1, wherein the first and second operators perform the operations according to a Rijndael encryption or decryption algorithm.

3. The encryption and decryption apparatus of claim 1, wherein the first operator comprises:

a first byte substitution part receiving any one of output data from the initial round key adder or the register part and performing one of a Rijndael byte substitution operation or a Rijndael inverse byte substitution operation for the one of the encryption or decryption, respectively;

a first column mixer receiving an output data from the first byte substitution part and performing one of a Rijndael mixed columns operation or a Rijndael inverse mixed columns operation for the encryption and decryption, respectively; and

a first round key adder receiving any one of output data from the first column mixer or the first byte substitution part, receiving a fourth part of the at least one round key from the round key generator, and performing a round key addition operation.

4. The encryption and decryption apparatus of claim 3, wherein the first operator further comprises a first selector which receives output data from the initial round key adder and the register part and selectively inputs any one of the output data to the first byte substitution part.

5. The encryption and decryption apparatus of claim 3, wherein the first operator further comprises a third selector which receives output data from the first column mixer and the first byte substitution part and selectively inputs the output data to the first round key adder.

6. The encryption and decryption apparatus of claim 5, wherein the third selector selects and inputs the output data of the first byte substitution part to the first round key adder at a final round among the plurality of the rounds.

7. The encryption and decryption apparatus of claim 1, wherein the second operator comprises:

a second byte substitution part receiving output data of the register part and performing one of a Rijndael byte substitution operation or a Rijndael inverse byte substitution operation for the one of the encryption or decryption;

a second column mixer receiving output data of the initial round key adder and performing a Rijndael mixed columns operation or a Rijndael inverse mixed columns operation for the encryption and decryption, respectively; and

a second round key adder receiving any one of output data from the first operator or the second column mixer, receiving a fourth part of the round key from the round key adder, and performing a round key addition operation.

8. The encryption and decryption apparatus of claim 7, wherein the second operator further comprises a second selector which receives output data from the second column mixer and the second byte substitution part and selectively inputs any one of the output data to the second round key adder.

9. The encryption and decryption apparatus of claim 8, wherein the second selector selects and inputs the output data of the second byte substitution part to the second round key adder at a final round among the plurality of the rounds.

10. The encryption and decryption apparatus of claim 1, wherein the register part comprises:

at least one register storing the first data and the second data; and

a selector receiving the first and second data from the register and selectively outputting the encrypted or decrypted data.

11. The encryption and decryption apparatus of claim 10, wherein the register part comprises first to sixteenth registers.

12. The encryption and decryption apparatus of claim 11, wherein the first to fourth registers receive output data from the first operator, and the fifth to eighth registers receive output data from the second operator.

13. The encryption and decryption apparatus of claim 11, wherein the data stored in the first to eighth registers are input to the ninth to sixteenth registers when next round data is input in the first to eighth registers.

14. The encryption and decryption apparatus of claim 11, wherein the data stored in the ninth to sixteenth registers are processed through a Rijndael shift row operation by the selector, and an output data of the selector is input to the first operator and the second operator.

15. The encryption and decryption apparatus of claim 1, wherein the a size of the input data is 128 bits, and the input data is divided into four 32-bit columns and is consecutively input to the initial round key adder.

16. A method of encrypting and decrypting data, comprising:

receiving data to be encrypted or decrypted;

performing preprocessing of the received data by performing a shift row operation of a Rijndael (AES) for encryption or an inverse shift row operation of the Rijndael (AES) for decryption;

performing a key schedule to calculate an initial key for encryption or decryption rounds to be added to the received data;

performing loading of the preprocessed data, and adding the loaded data to the calculated initial key;

performing a first round of the encryption or decryption rounds while loading the preprocessed data by performing the Rijndael (AES) for each one fourth of the preprocessed data and storing resulting data in state bytes array storage to perform a data permutation operation;

performing remaining rounds of the encryption or decryption rounds for each one half of data output from the state bytes array storage and storing the resulting data in the state bytes array storage to perform the data permutation operation, thereby outputting the resulting data.

17. The method of encrypting and decrypting data of claim 16, wherein the data permutation operation performed by the state bytes array storage includes:

receiving a first data to be stored;

storing the received first data into a first plurality of registers of the state bytes array storage;

receiving a second data to be stored;

storing the received second data into the first plurality of registers while saving the stored first data in the first plurality of registers into a second plurality of registers of the state bytes array storage;

selecting output data from the first and the second plurality of the registers to produce first and second columns of the state bytes array according to the shift row or the inverse shift row operation of Rijndael (AES) encrypting or decrypting, respectively, thereby outputting the first and the second columns;

partially updating the second plurality of registers while loading new data into the first plurality of the registers;

selecting output data from the second plurality of registers to produce third and fourth columns of the state bytes array according to the shift row or inverse shift row operation of Rijndael (AES) encrypting or decrypting, respectively, thereby outputting the third and the fourth columns.

18. The method of encrypting and decrypting data of claim 16, wherein the first round of the encryption or decryption rounds includes:

performing a byte substitution or an inverse byte substitution operation on each one fourth of the loaded data;

performing a mix columns or an inverse mix columns operation;

performing a round key addition operation; and

storing the resulting data of above operations in the state bytes array storage;

19. The method of encrypting and decrypting data of claim 16, wherein the remaining rounds of the encryption or decryption round includes:

performing the shift row or the inverse shift row operation on the stored data;

performing a mix columns or an inverse mix columns operation;

performing a round key addition operation; and

storing the resulting data of above operations in the state bytes array storage.

20. A data encryption system, comprising:

an input unit dividing input data into n-bit segments;

a round key generator receiving a master key and generating n-bit round keys corresponding to each round stage of an encryption process;

a first key adder which adds each of the n-bit segments with a first one of the n-bit round keys;

a first operator which performs a partial encryption operation on each of the added n-bit segments and adding a second one of the n-bit round keys to selected results of the partial encryption operation;

a second operator which performs a second encryption operation by using selected ones of the partial encryption results and a third one of the n-bit round keys; and

a register part temporarily storing each n-bit output from the first operator and each n-bit output from the second operator, feeding back each n-bit output from the first and second operators to the first and second operators, respectively, for operations of a next round stage, and combining each of the n-bit outputs to form an encrypted result when each round stage is complete.

21. The system of claim 20, wherein the first operator adds the second one of the n-bit round keys to odd n-bit segments.

22. The system of claim 21, wherein the second operator uses the selected ones of the partial encryption results which correspond to even n-bit segments.

23. The system of claim 20, wherein the first and second operators perform the encryption operations according to a Rijndael encryption algorithm.

24. The system of claim 23, wherein the first and second operators perform the encryption operations in parallel.

25. A method of encrypting data via parallel processing, comprising:

dividing input data into sequential n-bit segments;

generating n-bit round keys corresponding to a number of encryption rounds;

adding a first one of the n-bit round keys to each of the n-bit segments;

performing first encryption round operations on odd n-bit segments using a second one of the n-bit keys until the number of encryption rounds is complete;

performing second encryption round operations on even n-bit segments in parallel with the performing the first encryption round operations using a third one of the n-bit keys until the number of encryption rounds is complete; and

combining results from the first encryption round operations and the second encryption round operations to form an enciphered output.

26. The method of claim 25, wherein the first encryption round operations and the second encryption round operations are performed according to the Rijndael encryption algorithm.

27. The method of claim 26, wherein the first encryption round operations and the second encryption round operations are performed simultaneously.

28. The method of claim 25, wherein the first encryption round comprises:

performing a byte substitution operation of each of the odd n-bit segments;

performing a mix columns operation of each of the odd n-bit segments; and

performing a round key addition operation using the second n-bit round key.

29. The method of claim 28, wherein the second encryption round comprises:

performing the byte substitution operation of each of the even n-bit segments;

performing the mix columns operation of each of the even n-bit segments; and

performing the round key addition operation using the third n-bit round key.

30. The method of claim 25, wherein the first encryption round comprises:

performing a byte substitution operation of each of the odd and the even n-bit segments;

performing a mix columns operation of each of the odd and the even n-bit segments; and

performing a round key addition operation using the second n-bit round key and the odd n-bit segments.

31. The method of claim 30, wherein the second encryption round comprises:

receiving the even n-bit segments after the performing the mix columns operation of each of the odd and the even n-bit segments;

performing the byte substitution operation of each of the received even n-bit segments;

performing the mix columns operation of each of the received even n-bit segments; and

performing the round key addition operation using the third n-bit round key.

32. The method of claim 31, wherein the combining the results from the first encryption round operations and the second encryption round operations to form an enciphered output comprises

storing partial results corresponding to each round of the first encryption round and the second encryption round;

and

forming the enciphered output based on the stored partial results.

33. The method of claim 32, wherein the performing the mix columns operation on the odd and the even n-bit segments is not performed during a last of the encryption rounds.

34. The method of claim 32, wherein the first encryption round operations and the second encryption round operations are processed via the parallel processing such that the results are obtained quickly.