Phase locked loop calibration

• US 20050136873A1
• Filed: 12/19/2003
• Published: 06/23/2005
• Est. Priority Date: 12/19/2003
• Status: Active Grant

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Ibrahim, Brima B., Kim, Hea Joung
• Granted Patent: US 7,095,992 B2
• Time in Patent Office: Days
• US Class Current: 455/260
• CPC Class Codes: H03L 2207/06 Phase locked loops with a controlled oscillator having at least two frequency control terminals
• CPC Class Codes: H03L 7/0891 the up-down pulses controlling source and sink current generators, e.g. a charge pump

Abstract

A method for calibrating a phase locked loop (PLL) includes an open loop test and a closed loop test. The open loop test includes providing an optimal control input to a controlled oscillator (CO) of the PLL; determining rate of output oscillation of the CO based on the optimal control input; comparing the rate of the output oscillation with rate of an optimal output oscillation; and when the comparing the rate of the output oscillation with rate of the optimal output oscillation is unfavorable, adjusting an oscillation point of the CO until the comparing is favorable to produce an open-loop adjusted CO oscillation point. The close loop test includes determining a closed-loop input control level of the CO at the open-loop adjusted CO oscillation point; comparing the closed-loop input control level with the optimal control input; and when the comparing the closed-loop input control level with the optimal control input is not favorable, adjusting the open-loop adjusted CO oscillation point until the comparing is favorable.

Claims

1. A method for calibrating a phase locked loop (PLL), the method comprises:

performing an open loop test on the PLL by;

providing an optimal control input to a controlled oscillator (CO) of the PLL;

determining rate of output oscillation of the CO based on the optimal control input;

comparing the rate of the output oscillation with rate of an optimal output oscillation;

when the comparing the rate of the output oscillation with rate of the optimal output oscillation is unfavorable, adjusting an oscillation point of the CO until the comparing the rate of the output oscillation with rate of an optimal output oscillation is favorable to produce an open-loop adjusted CO oscillation point; and

performing a closed loop test of the PLL by;

determining a closed-loop input control level of the CO at the open-loop adjusted CO oscillation point;

comparing the closed-loop input control level with the optimal control input; and

when the comparing the closed-loop input control level with the optimal control input is not favorable, adjusting the open-loop adjusted CO oscillation point until the comparing the closed-loop input control level with the optimal control input is favorable.

2. The method of claim 1, wherein the controlled oscillator comprises at least one of a voltage controlled oscillator (VCO), a current controlled oscillator (ICO) and a digital oscillator.

3. The method of claim 1, wherein each of the adjusting an oscillation point of the CO until the comparing the rate of the output oscillation with rate of an optimal output oscillation is favorable to produce an open-loop adjusted CO oscillation point and the adjusting the open-loop adjusted CO oscillation point until the comparing the closed-loop input control level with the optimal control input is favorable further comprises:

adjusting, for each iteration of comparing and adjusting, resonant tuning of the controlled oscillator.

(for open loop and closed loop) (e.g., by adjusting the cap of an LC VCO)

4. The method of claim 3 further comprises:

utilizing a binary search for the adjusting of the resonant tuning.

5. The method of claim 4, wherein the comparing the rate of the output oscillation with rate of the optimal output oscillation comprises:

counting cycles of the output oscillation to produce an output oscillation count;

comparing the output oscillation count with a reference count that is based on a divider value times a predetermined number of cycles of the references oscillation;

when the output oscillation count is within a window of count vales of the reference count, indication that the comparison was favorable.

6. The method of claim 5 further comprises:

when the output oscillation count matches the reference count, ending the iterative comparing and adjusting; and

utilizing the adjusted resonant tuning of the controlled oscillator.

7. The method of claim 1, wherein the adjusting the oscillation point of the CO further comprises:

determining an offset between rate of the output oscillation with rate of an optimal output oscillation; and

adjusting the oscillation point of the CO based on the offset.

8. A phase locked loop (PLL) comprises:

regulation module operably coupled to generate a control signal based on at least one of a phase difference and a frequency difference between a reference oscillation and a feedback oscillation;

controlled oscillator operably coupled to produce an output oscillation based on the control signal; and

feedback module operably coupled to produce the feedback oscillation based on a divider value and the output oscillation, wherein the regulation module functions to calibrate the PLL by;

performing an open loop test on the PLL by;

providing an optimal control input to the controlled oscillator;

determining rate of output oscillation of the controlled oscillator based on the optimal control input;

comparing the rate of the output oscillation with rate of an optimal output oscillation;

when the comparing the rate of the output oscillation with rate of the optimal output oscillation is unfavorable, adjusting an oscillation point of the controlled oscillator until the comparing the rate of the output oscillation with rate of an optimal output oscillation is favorable to produce an open-loop adjusted controlled oscillator oscillation point; and

performing a closed loop test of the PLL by;

determining a closed-loop input control level of the controlled oscillator at the open-loop adjusted controlled oscillator oscillation point;

comparing the closed-loop input control level with the optimal control input; and

when the comparing the closed-loop input control level with the optimal control input is not favorable, adjusting the open-loop adjusted controlled oscillator oscillation point until the comparing the closed-loop input control level with the optimal control input is favorable.

9. The PLL of claim 8, wherein the controlled oscillator comprises at least one of a voltage controlled oscillator (VCO), a current controlled oscillator (ICO) and a digital oscillator.

10. The PLL of claim 8, wherein each of the adjusting an oscillation point of the CO until the comparing the rate of the output oscillation with rate of an optimal output oscillation is favorable to produce an open-loop adjusted CO oscillation point and the adjusting the open-loop adjusted CO oscillation point until the comparing the closed-loop input control level with the optimal control input is favorable further comprises:

adjusting, for each iteration of comparing and adjusting, resonant tuning of the controlled oscillator.

(for open loop and closed loop) (e.g., by adjusting the cap of an LC VCO)

11. The PLL of claim 10, wherein the regulation module further functions to:

utilize a binary search for the adjusting of the resonant tuning.

12. The PLL of claim 11, wherein the comparing the rate of the output oscillation with rate of the optimal output oscillation comprises:

counting cycles of the output oscillation to produce an output oscillation count;

comparing the output oscillation count with a reference count that is based on a divider value times a predetermined number of cycles of the references oscillation;

when the output oscillation count is within a window of count vales of the reference count, indication that the comparison was favorable.

13. The PLL of claim 12, wherein the regulation module further functions to:

when the output oscillation count matches the reference count, end the iterative comparing and adjusting; and

utilize the adjusted resonant tuning of the controlled oscillator.

14. The PLL of claim 8, wherein the adjusting the oscillation point of the CO further comprises:

determining an offset between rate of the output oscillation with rate of an optimal output oscillation; and

adjusting the oscillation point of the CO based on the offset.

15. A radio frequency integrated circuit (RFIC) comprises:

a transmitter section operably coupled to convert outbound data into outbound radio frequency (RF) signals based on a transmitter local oscillation;

a receiver section operably coupled to convert inbound RF signals into inbound data based on a receiver local oscillation; and

a local oscillation generator operably coupled to produce the transmitter local oscillation and the receiver local oscillation, wherein the local oscillation generator includes;

regulation module operably coupled to generate a control signal based on at least one of a phase difference and a frequency difference between a reference oscillation and a feedback oscillation;

controlled oscillator operably coupled to produce an output oscillation based on the control signal, wherein the transmitter local oscillation and the receiver local oscillation are derived from the output oscillation; and

feedback module operably coupled to produce the feedback oscillation based on a divider value and the output oscillation, wherein the regulation module functions to calibrate the PLL by;

performing an open loop test on the PLL by;

providing an optimal control input to the controlled oscillator;

determining rate of output oscillation of the controlled oscillator based on the optimal control input;

comparing the rate of the output oscillation with rate of an optimal output oscillation;

when the comparing the rate of the output oscillation with rate of the optimal output oscillation is unfavorable, adjusting an oscillation point of the controlled oscillator until the comparing the rate of the output oscillation with rate of an optimal output oscillation is favorable to produce an open-loop adjusted controlled oscillator oscillation point; and

performing a closed loop test of the PLL by;

determining a closed-loop input control level of the controlled oscillator at the open-loop adjusted controlled oscillator oscillation point;

comparing the closed-loop input control level with the optimal control input; and

when the comparing the closed-loop input control level with the optimal control input is not favorable, adjusting the open-loop adjusted controlled oscillator oscillation point until the comparing the closed-loop input control level with the optimal control input is favorable.

16. The RFIC of claim 15, wherein the controlled oscillator comprises at least one of a voltage controlled oscillator (VCO), a current controlled oscillator (ICO) and a digital oscillator.

17. The RFIC of claim 15, wherein each of the adjusting an oscillation point of the CO until the comparing the rate of the output oscillation with rate of an optimal output oscillation is favorable to produce an open-loop adjusted CO oscillation point and the adjusting the open-loop adjusted CO oscillation point until the comparing the closed-loop input control level with the optimal control input is favorable further comprises:

adjusting, for each iteration of comparing and adjusting, resonant tuning of the controlled oscillator.

18. The RFIC of claim 17, wherein the regulation module further functions to:

utilize a binary search for the adjusting of the resonant tuning.

19. The RFIC of claim 18, wherein the comparing the rate of the output oscillation with rate of the optimal output oscillation comprises:

counting cycles of the output oscillation to produce an output oscillation count;

comparing the output oscillation count with a reference count that is based on a divider value times a predetermined number of cycles of the references oscillation;

when the output oscillation count is within a window of count vales of the reference count, indication that the comparison was favorable.

20. The RFIC of claim 19, wherein the regulation module farther functions to:

when the output oscillation count matches the reference count, end the iterative comparing and adjusting; and

utilize the adjusted resonant tuning of the controlled oscillator.

21. The RFIC of claim 15, wherein the adjusting the oscillation point of the CO further comprises:

determining an offset between rate of the output oscillation with rate of an optimal output oscillation; and

adjusting the oscillation point of the CO based on the offset.