Securing an electronic device

• US 20050138409A1
• Filed: 12/22/2003
• Published: 06/23/2005
• Est. Priority Date: 12/22/2003
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Fullerton, Mark N., Brizek, John P., Khan, Moinul H., Wheeler, David M., Zhang, Minda, Sheriff, Tayib
• Application Number:
  US10/745,469
• Publication Number:
  US 20050138409A1
• Time in Patent Office: Days
• US Class Current: 726/26
• CPC Class Codes: G06F 21/572 Secure firmware programming, e.g. of basic input output system [BIOS]
• CPC Class Codes: G06F 21/575 Secure boot

Abstract

An apparatus includes a processor to control a boot-up of an electronic device in response to a detection of tampering with the device. In some embodiments of the invention, the processor may detect tampering by authenticating a source of a boot image used during the boot-up; and the processor may detect tampering by verifying the integrity of the boot image. In some embodiments of the invention, the processor may control a transition of the electronic device from a first state to a second power state in response to a detection of tampering with the device. The electronic device consumes more power in the second power state than in the first power state.

Claims

1. A method comprising:

controlling a boot-up of an electronic device in response to detecting tampering with the device.

2. The method of claim 1, wherein the detecting tampering comprises:

authenticating a source of a boot image used in the boot-up of the electronic device.

3. The method of claim 2, wherein the authenticating comprises:

authenticating a memory that stores the boot image.

4. The method of claim 2, wherein the authenticating comprises:

authenticating a host platform that provides the boot image for download.

5. The method of claim 2, wherein the authenticating comprises:

determining whether a hash provided by the source is identical to a trusted hash of a public key stored in the electronic device.

6. The method of claim 1, wherein the detecting tampering comprises:

determining an integrity of a boot image used in the boot-up of the electronic device.

7. The method of claim 6, wherein the determining the integrity comprises:

processing the boot image to produce a first digital signature; and

comparing the first digital signature to a second digital signature.

8. The method of claim 7, wherein the processing comprises generating a hash from the image.

9. The method of claim 7, further comprising:

decrypting data from a header associated with the image to generate the second digital signature.

10. The method of claim 1, wherein the controlling comprises:

controlling a download of a boot image during the boot-up in response to the determination.

11. The method of claim 1, wherein the controlling comprises:

selectively halting the boot-up in response to the determination.

12. An apparatus comprising:

a processor to control a boot-up of an electronic device in response to a detection of tampering with the device.

13. The apparatus of claim 12, wherein the electronic device comprises a portable device.

14. The apparatus of claim 12, wherein the apparatus comprises a wireless communication device.

15. The apparatus of claim 12, wherein the processor determines whether the image is authentic in response to a first digital signature of a boot image.

16. The apparatus of claim 15, wherein the processor comprises:

a first processing unit to boot-up the electronic device; and

a second processing unit separate from the first processing unit to detect whether tampering has occurred with the electronic device.

17. The apparatus of claim 16, further comprising:

a read only memory internal to the processor and storing instructions to cause the second processing unit to detect tampering with the device.

18. The apparatus of claim 16, further comprising:

a memory storing a public key,

wherein the second processing unit compares the public key stored in the memory with a public key of a header associated with a boot image to determine whether a source of the boot image is authentic.

19. The apparatus of claim 18, wherein the memory comprises a read only memory.

20. The apparatus of claim 12, wherein the processor decrypts data from a header associated with a boot image to generate a digital signature and compares the generated digital signature to a digital signature present in a header associated with the boot image to determine an integrity of the image.

21. A system comprising:

a wireless interface; and

a processor to control a boot-up of the system in response to a detection of tampering with the system.

22. The system of claim 21, wherein the wireless interface comprises an antenna.

23. The system of claim 21, wherein the wireless interface comprises a cellular interface.

24. The system of claim 21, wherein the processor decrypts data from a header associated with a boot image to generate a digital signature and compares the generated digital signature to a digital signature present in a header associated with the boot image to determine an integrity of the image.

25. The system of claim 21, wherein the processor compares a first public key with a second public key of a header associated with a boot image to determine whether the image is authentic.

26. An article comprising a storage medium readable by a processor-based system, the storage medium storing instructions to cause the processor-based system to:

control boot-up of the system in response to a detection of tampering with the system.

27. The article of claim 26, the storage medium storing instructions to cause the processor-based system to:

determine an integrity of a boot image of the system in response to a first digital signature of the image.

28. The article of claim 26, the storage medium storing instructions to cause the processor-based system to:

process a boot image to produce a first digital signature, and

compare the first digital signature to a second digital signature to determine an integrity of a boot image.

29. The article of claim 26, the storage medium storing instructions to cause the processor-based system to:

determine whether a source of a boot image is authentic in response to a hash of a public key.

30. The article of claim 26, the storage medium storing instructions to cause the processor-based system to:

halt boot-up of the system in response to the detection of tampering.

31. A method comprising:

controlling a transition of an electronic device from a first state to a second state in response to detecting tampering with the device, wherein the power consumption of the electronic device in the first power state is less than the power consumption of the electronic device in the second power state.

32. The method of claim 31, wherein the detecting tampering comprises:

authenticating a source of an image used in the transition of the device from the power conservation state to the higher power consumption state.

33. The method of claim 32, wherein the authenticating comprises:

determining whether a hash provided by the source is identical to a trusted hash of a public key stored in the device.

34. The method of claim 31, wherein the detecting tampering comprises:

determining an integrity of an image used in the transition of the device from the power conservation state to the higher power consumption state.

35. An apparatus comprising:

a processor to control a transition of an electronic device from a first power state to a second power state in response to detecting tampering with the device, wherein the power consumption of the electronic device in the first power state is less than the power consumption of the electronic device in the second power state.

36. The apparatus of claim 35, wherein the apparatus comprises a wireless communication device.

37. The apparatus of claim 35, wherein the processor determines an integrity of an image used in the transition to detect tampering with the device.

38. The apparatus of claim 35, wherein the processor determines an authenticity of a source of an image used in the transition to detect tampering with the device.

39. A system comprising:

a wireless interface; and

a processor to control a transition of the system from a first power state to a second power state in response to detecting tampering with the system, wherein the power consumption of the electronic device in the first power state is less than the power consumption of the electronic device in the second power state.

40. The system of claim 39, wherein the wireless interface comprises a cellular interface.

41. The system of claim 39, wherein the processor tests at least one of an integrity of an image used in the transition of the system and an authenticity of a source of the image to detect tampering with the system.

42. The system of claim 39, wherein the wireless interface comprises an antenna.

43. An article comprising a storage medium readable by a processor-based system, the storage medium storing instructions to cause the processor-based system to:

control a transition of the system from a first power state to a second power state in response to detecting tampering with the system, wherein the power consumption of the electronic device in the first power state is less than the power consumption of the electronic device in the second power state.

44. The article of claim 43, the storage medium storing instructions to cause the processor-based system to:

determine at least an integrity of an image used in the transition to detect tampering.

45. The article of claim 43, the storage medium storing instructions to cause the processor-based system to:

determine at least an authenticity of a source of an image used in the transition to detect tampering.