In-plane switching mode liquid crystal display device
First Claim
1. A substrate comprising:
- a plurality of gate and data lines crossing each other, the gate and data lines defining a plurality of pixel regions;
a plurality of thin film transistors formed at crossing portions of the gate and data lines;
a plurality of common lines between the gate lines;
a plurality of common electrodes projecting from the common lines;
a plurality of pixel electrodes connected with drain electrodes of the thin film transistors, the pixel electrodes formed in the pixel regions between the common electrodes;
a first common voltage supplying line that forms a first closed circuit by grouping adjacent odd numbered common lines; and
a second common voltage supplying line that forms a second closed circuit by grouping adjacent even numbered common lines.
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Accused Products
Abstract
An IPS mode LCD device is disclosed in which a common voltage drop and delay is decreased. The LCD includes gate and data lines crossing each other to define pixel regions. Thin film transistors are formed at crossing portions of the gate and data lines. Common lines are parallel with the gate lines and common electrodes project from the common lines parallel with the data lines. Pixel electrodes connected with drain electrodes of the thin film transistors are formed in the pixel regions between the parallel common electrodes. A first common voltage supplying line applies a first common voltage or a second common voltage to a closed circuit formed by grouping the adjacent odd numbered common lines. A second common voltage supplying line applies the second common voltage or the first common voltage to a closed circuit formed by grouping the adjacent even numbered common lines.
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Citations
18 Claims
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1. A substrate comprising:
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a plurality of gate and data lines crossing each other, the gate and data lines defining a plurality of pixel regions;
a plurality of thin film transistors formed at crossing portions of the gate and data lines;
a plurality of common lines between the gate lines;
a plurality of common electrodes projecting from the common lines;
a plurality of pixel electrodes connected with drain electrodes of the thin film transistors, the pixel electrodes formed in the pixel regions between the common electrodes;
a first common voltage supplying line that forms a first closed circuit by grouping adjacent odd numbered common lines; and
a second common voltage supplying line that forms a second closed circuit by grouping adjacent even numbered common lines. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A liquid crystal display (LCD) comprising:
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opposing substrates; and
a liquid crystal layer between the opposing substrates, wherein one of the opposing substrates includes;
a plurality of gate and data lines crossing each other, the gate and data lines defining a plurality of pixel regions;
a plurality of thin film transistors formed at crossing portions of the gate and data lines;
a plurality of common lines parallel with the gate lines;
a plurality of common electrodes projecting from the common lines, the common electrodes parallel with the data lines;
a plurality of pixel electrodes connected with drain electrodes of the thin film transistors, the pixel electrodes formed in the pixel regions between the common electrodes;
a first common voltage supplying line that connects a first set of the common lines together at a plurality of locations along each common line of the first set of the common lines; and
a second common voltage supplying line that connects a second set of the common lines together at a plurality of locations along each common line of the second set of the common lines. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17)
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18. A method comprising:
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forming gate lines;
forming common lines;
covering the gate lines and the common lines with an insulating layer;
etching contact holes in the insulating layer;
depositing and patterning a metal layer on the insulating layer, the metal layer forming;
data lines that cross the gate lines and define pixel regions, and common voltage supplying lines connecting, through the contact holes, a first set of the common lines together at a plurality of locations along each common line of the first set and connecting a second set of the common lines together at a plurality of locations along each common line of the second set;
coating a passivation layer on the data lines and the common voltage supplying lines;
depositing and patterning a transparent conductive material on the passivation layer, the patterned transparent conductive material forming pixel electrodes.
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Specification