STACKING MEMORY CHIPS USING FLAT LEAD-FRAME WITH BREAKAWAY INSERTION PINS AND PIN-TO-PIN BRIDGES
First Claim
1. A process for stacking chips comprising:
- forming insertion pins connected to an insertion-pin frame by necks, the insertion pins having a pitch matching a pitch of pins on a first chip;
wherein the insertion pins and the insertion-pin frame are flat and co-planar;
applying a first solder paste to a first surface of the insertion pins;
aligning the first chip to the insertion-pin frame and placing first pins of the first chip onto the first solder paste on the first surface of the insertion pins;
re-flowing the first solder paste by heating the insertion pins and the first pins to generate a first intermediate assembly;
applying a second solder paste to a second surface of the insertion pins, the second surface opposite the first surface;
aligning a second chip to the insertion-pin frame and placing second pins of the second chip onto the second solder paste on the second surface of the insertion pins;
re-flowing the second solder paste by heating the insertion pins and the second pins to generate a second intermediate assembly; and
detaching the insertion pins from the insertion-pin frame by breaking the necks between the insertion pins and the insertion-pin frame to form a final assembly of the first chip, the second chip, and the insertion pins, whereby the first chip is stacked with the second chip using the insertion pins that are flat and co-planar.
2 Assignments
0 Petitions
Accused Products
Abstract
Memory chips are assembled into a stack with an insertion-pin frame between pins of two stacked memory chips. The insertion-pin frame is not bent or formed into 3-dimensional shapes but is flat, improving use in standard surface-mount processes such as solder printing onto the insertion-pin frame. Flat insertion pins held to the flat insertion-pin frame by necks are soldered to top shoulders of pins on a lower chip. Then bottom feet of pins of an upper chip are soldered to the insertion pins. The necks are punched away or broken to release the insertion-pin frame from the insertion pins that are soldered to the assembled stacked chips. An insulated wire jumper can be placed under the pins to jumper chip-select connections, or a bridge between insertion pins can be formed from the insertion-pin frame. Holding tabs to the bridge are removed with the insertion pins or by punching.
29 Citations
18 Claims
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1. A process for stacking chips comprising:
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forming insertion pins connected to an insertion-pin frame by necks, the insertion pins having a pitch matching a pitch of pins on a first chip;
wherein the insertion pins and the insertion-pin frame are flat and co-planar;
applying a first solder paste to a first surface of the insertion pins;
aligning the first chip to the insertion-pin frame and placing first pins of the first chip onto the first solder paste on the first surface of the insertion pins;
re-flowing the first solder paste by heating the insertion pins and the first pins to generate a first intermediate assembly;
applying a second solder paste to a second surface of the insertion pins, the second surface opposite the first surface;
aligning a second chip to the insertion-pin frame and placing second pins of the second chip onto the second solder paste on the second surface of the insertion pins;
re-flowing the second solder paste by heating the insertion pins and the second pins to generate a second intermediate assembly; and
detaching the insertion pins from the insertion-pin frame by breaking the necks between the insertion pins and the insertion-pin frame to form a final assembly of the first chip, the second chip, and the insertion pins, whereby the first chip is stacked with the second chip using the insertion pins that are flat and co-planar. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A method of manufacturing a stacked-chip assembly comprising:
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printing regions of first solder paste onto first co-planer surfaces of insertion pins that are connected to an insertion-pin frame by frame necks;
placing top shoulders of lower pins of a lower chip into the regions of the first solder paste and heating the first solder paste to produce a first intermediate assembly;
printing regions of second solder paste onto second co-planer surfaces of insertion pins;
wherein the first co-planar surfaces are opposite the second co-planar surfaces;
placing feet of upper pins of an upper chip into the regions of the second solder paste and heating the second solder paste to produce a second intermediate assembly; and
breaking the necks to detach the insertion-pin frame from the second intermediate assembly with the insertion pins to generate the stacked-chip assembly, whereby the stacked-chip assembly of the upper chip and the lower chip is held together by the insertion pins that have co-planar surfaces. - View Dependent Claims (17, 18)
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Specification