Securities, chip mounting product, and manufacturing method thereof

• US 20050146006A1
• Filed: 12/22/2004
• Published: 07/07/2005
• Est. Priority Date: 12/26/2003
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kato, Kiyoshi, Yamazaki, Shunpei
• Granted Patent: US 7,566,010 B2
• Time in Patent Office: Days
• US Class Current: 257/679
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/07758 arrangements for adhering the record carrier to further objects or living beings, functioning as an identification tag
• CPC Class Codes: G06K 19/07767 the first and second communication means being two different antennas types, e.g. dipole and coil type, or two antennas of the same kind but operating at different frequencies
• CPC Class Codes: G07D 7/01 Testing electronic circuits therein
• CPC Class Codes: H01L 23/49855 for flat-cards, e.g. credit cards cards per se G06K19/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The invention provides an ID chip with reduced cost, increased impact resistance and attractive design, as well as products and the like mounting the ID chip and a manufacturing method thereof. In view of the foregoing, an integrated circuit having a semiconductor film with a thickness of 0.2 μm or less is mounted on securities including bills, belongings, containers of food and drink, and the like (hereinafter referred to as products and the like). The ID chip of the invention can be reduced in cost and increased in impact resistance as compared with a chip formed over a silicon wafer while maintaining an attractive design.

Claims

1. A security mounting a chip that comprises an integrated circuit including a semiconductor film with a thickness of 0.2 μ

m or less.

8. The security according to claim 1, wherein the semiconductor film is formed on an insulating surface over a substrate selected from the group consisting of a glass substrate, a quartz substrate, a stainless substrate, and a flexible substrate formed of a synthetic resin.

14. The security according to claim 1, wherein the integrated circuit comprises a thin film transistor including the semiconductor film.

2. A security mounting a chip comprising:

an integrated circuit including a semiconductor film with a thickness of 0.2 μ

m or less,

wherein the integrated circuit comprises a ROM that includes a memory cell having a circuit connection obtained by droplet ejection or laser cutting.

9. The security according to claim 2, wherein the semiconductor film is formed on an insulating surface over a substrate selected from the group consisting of a glass substrate, a quartz substrate, a stainless substrate, and a flexible substrate formed of a synthetic resin.

15. The security according to claim 2, wherein the integrated circuit comprises a thin film transistor including the semiconductor film.

3. A security mounting a chip comprising:

an integrated circuit including a semiconductor film with a thickness of 0.2 μ

m or less,

wherein the integrated circuit comprises a first ROM that includes a memory cell having a circuit connection obtained by droplet ejection or laser cutting and a second ROM that includes a memory cell having a circuit connection obtained by photolithography.

10. The security according to claim 3, wherein the semiconductor film is formed on an insulating surface over a substrate selected from the group consisting of a glass substrate, a quartz substrate, a stainless substrate, and a flexible substrate formed of a synthetic resin.

16. The security according to claim 3, wherein the integrated circuit comprises a thin film transistor including the semiconductor film.

4. A security mounting a chip comprising:

an integrated circuit including a semiconductor film with a thickness of 0.2 μ

m or less,

wherein the integrated circuit comprises a non-volatile and non-rewritable memory that stores specific data based on variations in characteristics of the semiconductor film.

5. The security according to claim 4, wherein the semiconductor film is formed of a crystalline semiconductor film.

11. The security according to claim 4, wherein the semiconductor film is formed on an insulating surface over a substrate selected from the group consisting of a glass substrate, a quartz substrate, a stainless substrate, and a flexible substrate formed of a synthetic resin.

17. The security according to claim 4, wherein the integrated circuit comprises a thin film transistor including the semiconductor film.

6. A security mounting a chip comprising:

an integrated circuit including a semiconductor film with a thickness of 0.2 μ

m or less; and

an antenna provided over the integrated circuit,

wherein the antenna is electrically connected to the integrated circuit.

12. The security according to claim 6, wherein the semiconductor film is formed on an insulating surface over a substrate selected from the group consisting of a glass substrate, a quartz substrate, a stainless substrate, and a flexible substrate formed of a synthetic resin.

18. The security according to claim 6, wherein the integrated circuit comprises a thin film transistor including the semiconductor film.

7. A security mounting a chip comprising:

an integrated circuit formed over a first substrate and including a semiconductor film with a thickness of 0.2 μ

m or less; and

an antenna formed over a second substrate,

wherein the antenna is electrically connected to the integrated circuit.

13. The security according to claim 7, wherein the semiconductor film is formed on an insulating surface over a substrate selected from the group consisting of a glass substrate, a quartz substrate, a stainless substrate, and a flexible substrate formed of a synthetic resin.

19. The security according to claim 7, wherein the integrated circuit comprises a thin film transistor including the semiconductor film.

20. A chip mounting product wherein the chip comprises an integrated circuit including a semiconductor film with a thickness of 0.2 μ

m or less,

wherein the integrated circuit comprises a ROM that includes a memory cell having a circuit connection obtained by droplet ejection or laser cutting.

26. The chip mounting product according to claim 20, wherein the semiconductor film is formed on an insulating surface over a substrate selected from the group consisting of a glass substrate, a quartz substrate, a stainless substrate, and a flexible substrate formed of a synthetic resin.

31. The chip mounting product according to claim 20, wherein the integrated circuit comprises a thin film transistor including the semiconductor film.

21. A chip mounting product wherein the chip comprises an integrated circuit including a semiconductor film with a thickness of 0.2 μ

m or less,

wherein the integrated circuit comprises a first ROM that includes a memory cell having a circuit connection obtained by droplet ejection or laser cutting and a second ROM that includes a memory cell having a circuit connection obtained by photolithography.

27. The chip mounting product according to claim 21, wherein the semiconductor film is formed on an insulating surface over a substrate selected from the group consisting of a glass substrate, a quartz substrate, a stainless substrate, and a flexible substrate formed of a synthetic resin.

32. The chip mounting product according to claim 21, wherein the integrated circuit comprises a thin film transistor including the semiconductor film.

22. A chip mounting product wherein the chip comprises an integrated circuit including a semiconductor film with a thickness of 0.2 μ

m or less,

wherein the integrated circuit comprises a non-volatile and non-rewritable memory that stores specific data based on variations in characteristics of the semiconductor film.

23. The chip mounting product according to claim 22, wherein the semiconductor film is formed of a crystalline semiconductor film.

28. The chip mounting product according to claim 22, wherein the semiconductor film is formed over an insulating surface of a substrate selected from the group consisting of a glass substrate, a quartz substrate, a stainless substrate, and a flexible substrate formed of a synthetic resin.

33. The chip mounting product according to claim 22, wherein the integrated circuit comprises a thin film transistor including the semiconductor film.

24. A chip mounting product comprising:

an integrated circuit including a semiconductor film with a thickness of 0.2 μ

m or less; and

an antenna provided over the integrated circuit,

wherein the antenna is electrically connected to the integrated circuit.

29. The chip mounting product according to claim 24, wherein the semiconductor film is formed on an insulating surface over a substrate selected from the group consisting of a glass substrate, a quartz substrate, a stainless substrate, and a flexible substrate formed of a synthetic resin.

34. The chip mounting product according to claim 24, wherein the integrated circuit comprises a thin film transistor including the semiconductor film.

25. A chip mounting product comprising:

an integrated circuit formed over a first substrate and including a semiconductor film with a thickness of 0.2 μ

m or less; and

an antenna formed over a second substrate,

wherein the antenna is electrically connected to the integrated circuit.

30. The chip mounting product according to claim 25, wherein the semiconductor film is formed on an insulating surface over a substrate selected from the group consisting of a glass substrate, a quartz substrate, a stainless substrate, and a flexible substrate formed of a synthetic resin.

35. The chip mounting product according to claim 25, wherein the integrated circuit

36. A manufacturing method of a security, comprising:

forming a semiconductor film with a thickness of 0.2 μ

m or less;

crystallizing the semiconductor film to form a crystalline semiconductor film;

forming an integrated circuit including the crystalline semiconductor film; and

mounting a chip including the integrated circuit.

42. The manufacturing method of a security, according to claim 36,

wherein an antenna electrically connected to the integrated circuit is formed.

46. The manufacturing method of a security, according to claim 36,

wherein the antenna is formed symmetrically with the integrated circuit interposed therebetween.

50. The manufacturing method of a security, according to claim 36,

wherein the antenna is formed over a second substrate;

wherein the second substrate is folded so as to interpose the integrated circuit; and

wherein the antenna is formed symmetrically with the integrated circuit interposed therebetween.

37. A manufacturing method of a security, comprising:

forming a semiconductor film with a thickness of 0.2 μ

m or less;

crystallizing the semiconductor film to form a crystalline semiconductor film;

forming a first metal wiring over the crystalline semiconductor film by photolithography;

forming an integrated circuit by forming a first memory cell and a second memory cell; and

mounting a chip including the integrated circuit,

wherein the first memory cell is selected by a circuit connection obtained by a first metal wiring formed by photolithography; and

wherein the second memory cell is selected by a circuit connection obtained by a second metal wiring formed by droplet ejection or laser cutting.

43. The manufacturing method of a security, according to claim 37,

wherein an antenna electrically connected to the integrated circuit is formed.

47. The manufacturing method of a security, according to claim 37,

wherein the antenna is formed symmetrically with the integrated circuit interposed therebetween.

51. The manufacturing method of a security, according to claim 37,

wherein the antenna is formed over a second substrate;

wherein the second substrate is folded so as to interpose the integrated circuit; and

wherein the antenna is formed symmetrically with the integrated circuit interposed therebetween.

38. A manufacturing method of a security, comprising:

forming a semiconductor film with a thickness of 0.2 μ

m or less;

crystallizing the semiconductor film by laser irradiation to form a crystalline semiconductor film;

forming an integrated circuit including the crystalline semiconductor film; and

mounting a chip including the integrated circuit.

40. The manufacturing method of a security, according to claim 38,

wherein a channel forming region of the semiconductor film is formed so that a direction of the laser irradiation is the same as a moving direction of carriers;

and

wherein the chip is mounted while being fixed so as to be bent in a direction perpendicular to that of the laser irradiation.

44. The manufacturing method of a security, according to claim 38,

wherein an antenna electrically connected to the integrated circuit is formed.

48. The manufacturing method of a security, according to claim 38,

wherein the antenna is formed symmetrically with the integrated circuit interposed therebetween.

52. The manufacturing method of a security, according to claim 38,

wherein the antenna is formed over a second substrate;

wherein the second substrate is folded so as to interpose the integrated circuit; and

wherein the antenna is formed symmetrically with the integrated circuit interposed therebetween.

39. A manufacturing method of a security, comprising:

forming a semiconductor film with a thickness of 0.2 μ

m or less;

adding a metal element to the semiconductor film and crystallizing the semiconductor film by heating to form a first crystalline semiconductor film;

crystallizing the first crystalline semiconductor film by laser irradiation to form a second crystalline semiconductor film;

forming an integrated circuit including the second crystalline semiconductor film; and

mounting a chip including the integrated circuit.

41. The manufacturing method of a security, according to claim 39,

wherein a channel forming region of the semiconductor film is formed so that a direction of the laser irradiation is the same as a moving direction of carriers;

and

wherein the chip is mounted while being fixed so as to be bent in a direction perpendicular to that of the laser irradiation.

45. The manufacturing method of a security, according to claim 39,

wherein an antenna electrically connected to the integrated circuit is formed.

49. The manufacturing method of a security, according to claim 39,

wherein the antenna is formed symmetrically with the integrated circuit interposed therebetween.

53. The manufacturing method of a security, according to claim 39,

wherein the antenna is formed over a second substrate;

wherein the second substrate is folded so as to interpose the integrated circuit; and

wherein the antenna is formed symmetrically with the integrated circuit interposed therebetween.

54. A manufacturing method of a chip mounting product, comprising:

forming a semiconductor film with a thickness of 0.2 μ

m or less;

crystallizing the semiconductor film to form a crystalline semiconductor film;

forming an integrated circuit including the crystalline semiconductor film; and

mounting a chip including the integrated circuit.

60. The manufacturing method of a chip mounting product, according to claim 54,

wherein an antenna electrically connected to the integrated circuit is formed.

64. The manufacturing method of a chip mounting product, according to claim 54,

wherein the antenna is formed symmetrically with the integrated circuit interposed therebetween.

68. The manufacturing method of a chip mounting product, according to claim 54,

wherein the antenna is formed over a second substrate;

and

wherein the second substrate is folded so as to interpose the integrated circuit and the antenna is formed symmetrically with the integrated circuit interposed therebetween.

55. A manufacturing method of a chip mounting product, comprising:

forming a semiconductor film with a thickness of 0.2 μ

m or less;

crystallizing the semiconductor film to form a crystalline semiconductor film;

forming a metal wiring over the crystalline semiconductor film by photolithography;

forming an integrated circuit by forming a first memory cell having a circuit connection obtained by the metal wiring and by forming a second memory cell having a circuit connection by a metal wiring formed over the crystalline semiconductor film by droplet ejection or laser cutting; and

mounting a chip including the integrated circuit.

61. The manufacturing method of a chip mounting product, according to claim 55,

wherein an antenna electrically connected to the integrated circuit is formed.

65. The manufacturing method of a chip mounting product, according to claim 55,

wherein the antenna is formed symmetrically with the integrated circuit interposed therebetween.

69. The manufacturing method of a chip mounting product, according to claim 55,

wherein the antenna is formed over a second substrate;

and

wherein the second substrate is folded so as to interpose the integrated circuit and the antenna is formed symmetrically with the integrated circuit interposed therebetween.

56. A manufacturing method of a chip mounting product, comprising

forming a semiconductor film with a thickness of 0.2 μ

m or less;

crystallizing the semiconductor film by laser irradiation to form a crystalline semiconductor film;

forming an integrated circuit including the crystalline semiconductor film; and

mounting a chip including the integrated circuit.

58. The manufacturing method of a chip mounting product, according to claim 56,

wherein a channel forming region of the semiconductor film is formed so that a direction of the laser irradiation is the same as a moving direction of carriers;

and

wherein the chip is mounted while being fixed so as to be bent in a direction orthogonal to that of the laser irradiation.

62. The manufacturing method of a chip mounting product, according to claim 56,

wherein an antenna electrically connected to the integrated circuit is formed.

66. The manufacturing method of a chip mounting product, according to claim 56,

wherein the antenna is formed symmetrically with the integrated circuit interposed therebetween.

70. The manufacturing method of a chip mounting product, according to claim 56,

wherein the antenna is formed over a second substrate;

and

wherein the second substrate is folded so as to interpose the integrated circuit and the antenna is formed symmetrically with the integrated circuit interposed therebetween.

57. A manufacturing method of a chip mounting product, comprising:

forming a semiconductor film with a thickness of 0.2 μ

m or less;

adding a metal element to the semiconductor film and crystallizing the semiconductor film by heating to form a first crystalline semiconductor film;

crystallizing the first crystalline semiconductor film by laser irradiation to form a second crystalline semiconductor film;

forming an integrated circuit including the second crystalline semiconductor film; and

mounting a chip including the integrated circuit.

59. The manufacturing method of a chip mounting product, according to claim 57,

wherein a channel forming region of the semiconductor film is formed so that a direction of the laser irradiation is the same as a moving direction of carriers;

and

wherein the chip is mounted while being fixed so as to be bent in a direction orthogonal to that of the laser irradiation.

63. The manufacturing method of a chip mounting product, according to claim 57,

wherein an antenna electrically connected to the integrated circuit is formed.

67. The manufacturing method of a chip mounting product, according to claim 57,

wherein the antenna is formed symmetrically with the integrated circuit interposed therebetween.

71. The manufacturing method of a chip mounting product, according to claim 57,

wherein the antenna is formed over a second substrate;

and

wherein the second substrate is folded so as to interpose the integrated circuit and the antenna is formed symmetrically with the integrated circuit interposed therebetween.