Fast high-swing modulator driver circuit

• US 20050147136A1
• Filed: 12/29/2003
• Published: 07/07/2005
• Est. Priority Date: 12/29/2003
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: Inphi Corporation
• Inventors: Pobanz, Carl W.
• Granted Patent: US 7,010,008 B2
• Time in Patent Office: Days
• US Class Current: 372/26
• CPC Class Codes: G02F 1/0121 Operation of devices; Circuit arrangements, not otherwise provided for in this subclass
• CPC Class Codes: H01S 5/0427 for applying modulation to the laser

Abstract

A fast, high-swing driver circuit for driving an electro-optical modulator includes an output stage comprising first and second transistors arranged as a differential pair. The collector of the first transistor is coupled to ground, and its base provides the stage'"'"'s input. The collector of the second transistor is coupled via an impedance to a supply voltage, and provides the stage'"'"'s output. A reference voltage is provided to the second transistor'"'"'s base, which is also AC-coupled to ground. A bias generator provides the second transistor'"'"'s base voltage, and a second differential pair converts a differential input signal to a single-ended output that drives the output stage'"'"'s input—preferably via a pair of cascaded emitter-follower stages that serve to present a low impedance. A complete electro-optical modulator driver is formed with the addition of a bias-T network at the output stage'"'"'s output.

Claims

1. A driver circuit suitable for use in an electro-optical modulator driver, comprising:

an output stage, comprising;

first and second bipolar transistors arranged as a first differential pair, the emitters of said transistors connected together at a first common node, said first transistor'"'"'s collector coupled to ground;

a first current source connected between said first common node and a first supply voltage which provides bias current to said first differential pair;

said second transistor'"'"'s collector coupled to a second supply voltage via an impedance and providing said driver circuit'"'"'s output;

a reference voltage provided to said second transistor'"'"'s base; and

a capacitor connected between said second transistor'"'"'s base and ground such that said second transistor'"'"'s base is at AC ground;

such that said output stage amplifies an input signal applied to said first transistor'"'"'s base and provides said amplified input signal at said driver circuit'"'"'s output;

a third bipolar transistor, the base of which provides said driver circuit'"'"'s input and the emitter of which is connected to said first transistor'"'"'s base; and

a second current source connected between said third transistor'"'"'s emitter and said first supply voltage which provides bias current to said third transistor, said third transistor and second current source forming an emitter-follower circuit which presents a low impedance to said first transistor'"'"'s base.

2. The driver circuit of claim 1, wherein said first transistor'"'"'s collector is coupled to ground via a diode.

3. The driver circuit of claim 1, further comprising a bias-T network having a DC input, a signal input and an AC output, said bias-T network connected at its signal input to said driver circuit'"'"'s output and connected at its DC input to a supply voltage.

4. The driver circuit of claim 3, further comprising an electro-optical modulator connected at its electrical input to said bias-T network'"'"'s AC output.

5. The driver circuit of claim 4, wherein said electro-optical modulator is a single-ended Mach-Zehnder modulator.

6. The driver circuit of claim 1;

wherein said first current source is arranged such that its output current can be varied in response to a control signal to adjust the output voltage swing of said output stage'"'"'s output.

7. The driver circuit of claim 1, further comprising:

a fourth bipolar transistor, the emitter of which is connected to said third transistor'"'"'s base; and

a third current source connected between said fourth transistor'"'"'s emitter and said first supply voltage which provides bias current to said fourth transistor, said fourth transistor and third current source forming an emitter-follower circuit which presents a low impedance to said third transistor'"'"'s base;

fifth and sixth bipolar transistors arranged as a second differential pair, the emitters of said fifth and sixth transistors connected together at a second common node; and

a fourth current source connected between said second common node and said first supply voltage which provides bias current to said second differential pair, the collectors of said fifth and sixth transistors coupled to ground via respective resistances and the base of said fourth transistor connected to the collector of one of said fifth and sixth transistors to form a driver stage, the bases of said fifth and sixth transistors providing differential inputs for said driver stage.

8. The driver circuit of claim 7, wherein said first current source is arranged such that its output current can be varied in response to a control signal to adjust the output voltage swing of said driver circuit'"'"'s output, and at least one of said second and fourth current sources is arranged such that their output currents vary with the output current of said first current source.

9. The driver circuit of claim 7, further comprising a reference voltage generator circuit which provides said reference voltage to said second transistor'"'"'s base, said reference voltage generator circuit arranged to replicate the DC bias voltage provided to the base of said first transistor and to provide said replicated voltage as said reference voltage.

10. The driver circuit of claim 9, wherein said reference voltage generator circuit comprises:

a resistor connected between ground and a third common node;

a fifth current source connected between said third common node and said first supply voltage;

a ninth bipolar transistor, the base of which is connected to said third common node;

a sixth current source connected between said ninth transistor'"'"'s emitter and said first supply voltage which provides bias current to said ninth transistor, said ninth transistor and sixth current source forming an emitter-follower circuit;

a tenth bipolar transistor, the base of which is connected to the emitter of said ninth transistor; and

a seventh current source connected between said tenth transistor'"'"'s emitter and said first supply voltage which provides bias current to said tenth transistor, said tenth transistor and seventh current source forming an emitter-follower circuit, the emitter of said tenth bipolar transistor providing said reference voltage.

11. The output stage of claim 10, wherein said tenth and ninth bipolar transistors are scaled with respect to said third and fourth transistors, respectively, and said fifth and seventh current sources are scaled with respect to said fourth and second current sources, respectively.

12. The output stage of claim 1, wherein said impedance comprises a resistance which provides a back termination resistance for a load driven by said output stage.

13. The output stage of claim 12, wherein said impedance further comprises a shunt-peaking inductor connected in series with said resistance.

14. The output stage of claim 1, wherein said output stage is fabricated on a coplanar waveguide (CPW) layout, comprising:

a plurality of signal paths;

a ground plane electrically isolated from and surrounding said signal paths and forming a coplanar waveguide (CPW) with said signal paths;

wherein said first transistor comprises a plurality of transistors connected in parallel, with their bases connected to a first signal path, their emitters connected to a second signal path, and their collectors coupled to said ground plane, said first transistor'"'"'s constituent transistors arranged symmetrically about said second signal path; and

said second transistor comprises a plurality of transistors connected in parallel, with their bases connected to said capacitor, their emitters connected to said second signal path, and their collectors connected to a third signal path, said second transistor'"'"'s constituent transistors arranged symmetrically about said third signal path.

15. The output stage of claim 14, wherein said capacitor is divided into two halves which are arranged symmetrically about said third signal path, and said resistance is provided by a resistor divided into two halves which are arranged symmetrically about said third signal path.

16. The output stage of claim 14, wherein said second transistor'"'"'s constituent transistors are arranged such that none of their collector terminals overlaps any of their base terminals.

17. A electro-optical modulator driver, comprising:

first and second bipolar transistors (M5,M6) arranged as a first differential pair, the emitters of said first and second transistors connected together at a first common node;

a first current source (54) connected between said first common node and a first supply voltage which provides bias current to said first differential pair, the collectors of said first and second transistors coupled to ground via respective resistances, the bases of said first and second transistors providing differential inputs for said driver circuit;

a third bipolar transistor (M4) having its base connected to the collector of one of said first and second transistors;

a second current source (48) connected between said third transistor'"'"'s emitter and said first supply voltage which provides bias current to said third transistor, said third transistor and second current source forming an emitter-follower circuit;

a fourth bipolar transistor (M3), the base of which is connected to the emitter of said third transistor;

a third current source (46) connected between said fourth transistor'"'"'s emitter and said first supply voltage which provides bias current to said fourth transistor, said fourth transistor and third current source forming an emitter-follower circuit;

fifth and sixth bipolar transistors (M1,M2) arranged as a second differential pair, the emitters of said transistors connected together at a second common node;

a fourth current source (44) connected between said second common node and said first supply voltage which provides bias current to said first differential pair;

said fifth transistor'"'"'s collector coupled to ground via a diode (38) and said fifth transistor'"'"'s base connected to the emitter of said fourth transistor;

said sixth transistor'"'"'s collector coupled to a supply voltage via a resistance;

a reference voltage provided to said sixth transistor'"'"'s base;

a capacitor connected between said sixth transistor'"'"'s base and ground such that said sixth transistor'"'"'s base is at AC ground; and

a bias-T network having a DC input, a signal input and an AC output, said bias-T network connected at its signal input to said sixth transistor'"'"'s collector and connected at its DC input to a supply voltage, said bias-T network'"'"'s AC output providing said driver circuit'"'"'s output;

such that said driver circuit amplifies a differential input signal applied to said differential inputs and provides said amplified input signal as a single-ended output signal at said driver-circuit'"'"'s output.

18. The driver of claim 17, further comprising an electro-optical modulator connected at its electrical input to said bias-T network'"'"'s AC output.

19. The driver of claim 18, wherein said electro-optical modulator is a single-ended Mach-Zehnder modulator.

20. The driver of claim 17, wherein said fourth current source is arranged such that its output current can be varied in response to a control signal to adjust the output voltage swing of said driver circuit'"'"'s output.

21. The driver circuit of claim 17, further comprising a reference voltage generator circuit which provides said reference voltage to said sixth transistor'"'"'s base, said reference voltage generator circuit arranged to replicate the DC bias voltage provided to the base of said fifth transistor and to provide said replicated voltage as said reference voltage.

22. The driver circuit of claim 17, wherein said resistance provides a back termination resistance for the load driven by said output stage.