Image deblurring with a systolic array processor

• US 20050147313A1
• Filed: 12/29/2003
• Published: 07/07/2005
• Est. Priority Date: 12/29/2003
• Status: Abandoned Application

• Current Assignee: Honeywell International Inc.
• Original Assignee: Honeywell International Inc.
• Inventors: Gorinevsky, Dimitry
• Application Number:
  US10/749,694
• Publication Number:
  US 20050147313A1
• Time in Patent Office: Days
• US Class Current: 382/255
• CPC Class Codes: G06T 5/003 Deblurring; Sharpening vibration or motion blur correction for cameras comprising an electronic image sensor H04N23/682
• CPC Class Codes: G06T 5/20 using local operators
• CPC Class Codes: G06T 5/73 Deblurring; Sharpening

Abstract

A method and device for deblurring an image having pixels. A blurred image is downloaded into a systolic array processor having an array of processing logic blocks such that each pixel arrives in a respective processing logic block of one pixel or small groups of pixels. Data is sequentially exchanged between processing logic blocks by interconnecting each processing logic block with a predefined number of adjacent processing logic blocks, followed by uploading the deblurred image. The processing logic blocks provide an iterative update of the blurred image by (i) providing feedback of the blurred image prediction error using the deblurred image and (ii) providing feedback of the past deblurred image estimate. The iterative update is implemented in the processing logic blocks by u(n+1)=u(n)−K*(H*u(n)−y_b)−S*u(n).

Claims

1. A method of deblurring an image, comprising the steps of.

downloading a blurred image having pixels into a systolic array processor, said processor comprising an array of processing logic blocks such that groups of pixel arrive in respective processing logic blocks;

sequentially exchanging data between processing logic blocks by interconnecting each processing logic block with a predefined number of the processing logic blocks adjacent thereto; and

uploading the deblurred image.

2. The method of claim 1, wherein said processing logic blocks providing an iterative update of said blurred image by (i) providing feedback of the blurred image prediction error using the deblurred image and (ii) providing feedback of the past deblurred image estimate.

3. The method of claim 1, wherein said iterative update is implemented in said processing logic blocks by u(n+1)=u(n)−

K*(H*u(n)−

y_b)−

S*u(n) where u is the ideal undistorted image, m and n are column and row indices of an image pixel element, y_b(m,n) is the observed blurred image, * denotes a 2-D convolution, K is a feedback update operator with a convolution kernel k(m,n) and S is a smoothing operator with a convolution kernel s(m,n).

4. The method of claim 1, wherein said iterative update is implemented in said processing logic blocks by u(n+1;

c)=u(n, c)−

K*(H*u(n, c)−

y_b(c))−

S*u(n,c) where y_b(c)=y_d(j,k,c) is the 2-D array of color c intensities for the blurred image encompassing all pixels (j,k) in the image and u(n, c)=u(j,k,n,c) is the 2-D array of color c intensities for the restored image estimates at iteration number n.

5. The of claim 1, wherein said processor groups pixel in groups that comprises at least one pixel.

6. The method of claim 5, wherein said groups of pixels comprises a group selected from 2 by 2 pixels, 3 by 3 pixels, and 4 by 4 pixels.

7. A device for deblurring an image, comprising:

an blurred image source having pixels;

a systolic array processor adapted to download said blurred image, said processor comprising an array of processing logic blocks such that groups of pixels arrive in respective processing logic blocks;

said processor being adapted to sequentially exchange data between processing logic blocks by interconnecting each processing logic block with a predefined number of the processing logic blocks adjacent thereto; and

said processor including an upload for the deblurred image.

8. The device of claim 7, wherein said processor is adapted to process logic blocks to provide an iterative update of said blurred image by (i) providing feedback of the blurred image prediction error using the deblurred image and (ii) providing feedback of the past deblurred image estimate.

9. The device of claim 7, wherein said processor includes an iterative update implemented in said processing logic blocks by u(n+1)=u(n)−

K*(H* u(n)−

y_b)−

S*u(n) where u is the ideal undistorted image, m and n are column and row indices of an image pixel element, y_b(m,n) is the observed blurred image, * denotes a 2-D convolution, K is a feedback update operator with a convolution kernel k(m,n) and S is a smoothing operator with a convolution kernel s(m,n).

10. The device of claim 9, wherein the operators H, K, and S are preloaded in each of the array processing logic blocks.

11. The device of claim 7, wherein said iterative update is implemented in said processing logic blocks by u(n+1;

c)=u(n, c)−

K*(H*u(n, c)−

y_b(c))−

S*u(n,c) where y_b(c)=y_d(j,k,c) is the 2-D array of color c intensities for the blurred image encompassing all pixels (j,k) in the image and u(n, c)=u(j,k,n,c) is the 2-D array of color c intensities for the restored image estimates at iteration number n.

12. The device of claim 7, wherein said processor groups pixel in groups that comprises at least one pixel.

13. The device of claim 12, wherein said groups of pixels comprises a group selected from 2 by 2, 3 by 3 and 4 by 4 pixels.

14. A device for deblurring an image, comprising:

image means for providing a blurred image having pixels;

systolic array processor means for processing said blurred image and adapted to download said blurred image, said processor means comprising an array of processing logic block means for processing groups of pixels in respective processing logic blocks;

said processor means being adapted to sequentially exchange data between processing logic block means by interconnecting each processing logic block means with a predefined number of the processing logic block means adjacent thereto; and

said processor means including means for uploading the deblurred image.

15. The device of claim 14, wherein said processor means is adapted to process logic blocks to provide an iterative update of said blurred image by (i) providing feedback of the blurred image prediction error using the deblurred image and (ii) providing feedback of the past deblurred image estimate.

16. The device of claim 15, wherein said processor includes means an iterative update implemented in said processing logic block means by u(n+1)=u(n)−

K*(H*u(n)−

y_b)−

S*u(n) where u is the ideal undistorted image, m and n are column and row indices of an image pixel element, y_b(m,n) is the observed blurred image, * denotes convolution, K is a feedback update operator with a convolution kernel k(m,n) and S is a smoothing operator with a convolution kernel s(m,n).

17. The device of claim 16, wherein the operators H, K, and S are preloaded in each of the array processing logic blocks.

18. The device of claim 15, wherein said iterative update is implemented in said processing logic blocks by u(n+1;

c)=u(n, c)−

K*(H*u(n, c)−

y_b(c)−

S*u(n,c) where y_b(c)=y_d(j,k,c) is the 2-D array of color c intensities for the blurred image encompassing all pixels (j,k) in the image and u(n, c)=u(j,k,n,c) is the 2-D array of color c intensities for the restored image estimates at iteration number n.

19. The device of claim 14, wherein said processor groups pixel in groups that comprises at least one pixel.

20. The device of claim 19, wherein said groups of pixels comprises a group selected from 2 by 2, 3 by 3 and 4 by 4 pixels.