Amplification apparatus, systems, and methods

• US 20050148308A1
• Filed: 12/29/2003
• Published: 07/07/2005
• Est. Priority Date: 12/29/2003
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Franca-Neto, Luiz M.
• Application Number:
  US10/749,927
• Publication Number:
  US 20050148308A1
• Time in Patent Office: Days
• US Class Current: 455/108
• CPC Class Codes: H03F 3/2171 with field-effect devices H03F3/2173 - H03F3/2178 take precedence
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 2001/0408 with power amplifiers

Abstract

An apparatus and a system, as well as a method and an article, may include adjusting a duty cycle of a switching amplifier input by changing the amplitude of an analog message signal to provide a modulated carrier having a monotonically-increasing fundamental frequency component.

Claims

1. An apparatus, including:

a modulator having a clock input including a duty cycle to be modulated by an analog message signal, the modulator to provide a modulated carrier with a monotonically-increasing fundamental frequency component to a switching amplifier.

2. The apparatus of claim 1, wherein the duty cycle is limited to less than about 50%.

3. The apparatus of claim 1, wherein the clock input includes a frequency of about 500 MHz to about 100 GHz.

4. The apparatus of claim 1, wherein the clock input is used to initiate charging and discharging of a capacitor.

5. The apparatus of claim 4, wherein a rate of discharge of the capacitor is controlled by the analog message signal.

6. The apparatus of claim 1, wherein the analog message signal includes a plurality of quadrature amplitude modulated symbols.

7. An apparatus, including:

a duty cycle modulator to raise and lower the mean value of a sinusoidal signal according to a level of an analog message signal to provide a modulated signal with a monotonically-increasing fundamental frequency component to a switching amplifier.

8. The apparatus of claim 7, wherein the duty cycle is limited to less than about 50%.

9. The apparatus of claim 7, wherein the analog message signal includes quadrature amplitude modulated symbols.

10. A system, including:

a modulator having a clock input including a duty cycle to be modulated by an analog message signal, the modulator to provide a modulated carrier with a monotonically-increasing fundamental frequency component; and

a switching power amplifier to receive the modulated carrier and coupled to the modulator.

11. The system of claim 10, further including:

a monopole antenna to couple to the switching power amplifier.

12. The system of claim 10, wherein the switching power amplifier is selected from a class D amplifier, a class E amplifier, and a class S amplifier.

13. The system of claim 10, further including:

a driver to directly couple the modulator to the switching power amplifier.

14. The system of claim 10, further including:

a digital-to-analog converter to provide the analog message signal.

15. A method, including:

adjusting a duty cycle of a switching amplifier input by changing an amplitude of an analog message signal to provide a modulated carrier having a monotonically-increasing fundamental frequency component.

16. The method of claim 15, wherein adjusting the duty cycle further includes:

limiting the duty cycle to less than about 50%.

17. The method of claim 15, wherein the amplitude of the analog message signal changes according to a multiple carrier communication technique.

18. The method of claim 17, wherein the multiple carrier communication technique includes an orthogonal frequency division multiplexing (OFDM) process.

19. The method of claim 15, further including:

pre-distorting a quadrature amplitude modulation (QAM) signal included in the analog message signal to compensate non-linearity associated with the switching amplifier.

20. The method of claim 15, further including:

pre-distorting an orthogonal frequency division multiplexed signal included in the analog message signal to compensate non-linearity associated with the switching amplifier.

21. An article comprising a machine-accessible medium having associated information, wherein the information, when accessed, results in a machine performing:

adjusting a duty cycle of a switching amplifier input by changing an amplitude of an analog message signal to provide a modulated carrier having a monotonically-increasing fundamental frequency component.

22. The article of claim 21, wherein adjusting the duty cycle further includes:

limiting the duty cycle to less than about 50%.

23. The article of claim 21, wherein the analog message signal includes quadrature amplitude modulated (QAM) symbols, and wherein the information, when accessed, results in the machine performing:

pre-distorting a quadrature amplitude modulation (QAM) signal included in the analog message signal to compensate non-linearity associated with the switching amplifier.

24. The article of claim 24, wherein the analog message signal includes an orthogonal frequency division multiplexed (OFDM) signal, and wherein the information, when accessed, results in the machine performing:

pre-distorting the OFDM signal included in the analog message signal to compensate non-linearity associated with the switching amplifier.