Method to validate system configuration

• US 20050149644A1
• Filed: 02/08/2005
• Published: 07/07/2005
• Est. Priority Date: 04/18/2001
• Status: Active Grant

• Current Assignee: Joel Kenneth Lyman, Ralph Thomas Beeston
• Original Assignee: Joel Kenneth Lyman, Ralph Thomas Beeston
• Inventors: Lyman, Joel Kenneth, Beeston, Ralph Thomas
• Granted Patent: US 7,567,886 B2
• Time in Patent Office: Days
• US Class Current: 710/15
• CPC Class Codes: G06F 15/177 Initialisation or configuration control processor initialisation G06F9/4405

Abstract

A data storage and retrieval system which includes encoded information regarding known valid system configurations, nominal performance specifications for various I/O devices, and nominal performance specifications for various interconnecting communication buses. A method to validate the apparent configuration of Applicants'"'"' system. A method to evaluate the performance of each I/O device and interconnecting bus disposed within Applicants'"'"' system.

Claims

1. A method to evaluate the performance of input/output devices and interconnecting buses disposed in a data storage and retrieval system, wherein said data storage and retrieval system comprises a host computer, one or a plurality of input/output devices, a first bus having a first maximum data transfer rate connecting said host computer to each of said one or a plurality of input/output devices, first information comprising one or more valid system configurations, and second information comprising an apparent system configuration, said method comprising the steps of:

providing third information via said first bus to one of said one or plurality of input/output devices;

receiving fourth information via said first bus from said one of said one or plurality of input/output devices;

analyzing said fourth information;

evaluating the performance of said one of said one or a plurality of input/output devices; and

evaluating the performance of said first bus.

2. The method of claim 1, wherein said third information comprises connect commands, disconnect commands, and combinations thereof, and wherein said fourth information comprises device status information, transmitted data, and bus access requests.

3. The method of claim 1, wherein said providing step further comprises providing said third information at said first maximum data transfer rate.

4. The method of claim 2, further comprising the steps of:

providing said third information via said first bus to each of said one or a plurality of input/output devices; and

receiving said fourth information via said first bus from each of said one or a plurality of input/output devices.

5. The method of claim 4, wherein said data retrieval system further comprises a second bus having a second maximum data transfer rate, said method further comprising the steps of:

providing fifth information via said second bus to said one of said one or a plurality of input/output devices;

receiving sixth information via said second bus from said one of said one or a plurality of input/output devices;

analyzing said sixth information; and

evaluating the performance of said second bus.

6. The method of claim 5, wherein said fifth information is selected from the group consisting of connect commands, disconnect commands, and combinations thereof.

7. The method of claim 6, further comprising the steps of:

providing said fifth information via said second bus to each of said one or a plurality of input/output devices; and

receiving said sixth information via said second bus from each of said one or a plurality of input/output devices.

8. A data storage and retrieval system comprising a computer useable medium having computer readable program code disposed therein for evaluating the performance of input/output devices and interconnecting buses disposed within a data storage and retrieval system, wherein said data storage and retrieval system comprises a host computer, one or a plurality of input/output devices, a first bus having a first maximum data transfer rate connecting said host computer to each of said one or a plurality of input/output devices, first information comprising one or more valid system configurations, and second information comprising an apparent system configuration, the computer readable program code comprising a series of computer readable program steps to effect:

providing to one of said one or plurality of input/output devices third information via said first bus;

receiving from said one of said one or plurality of input/output devices fourth information via said first bus;

analyzing said fourth information;

evaluating the performance of said one of said one or a plurality of input/output devices; and

evaluating the performance of said first bus.

9. The data storage and retrieval system of claim 8, wherein said third information comprises connect commands, disconnect commands, and combinations thereof.

10. The method of claim 9, wherein said providing step further comprises providing said third information at said first maximum data transfer rate.

11. The data storage and retrieval system of claim 9, wherein said computer readable program code further comprises a series of computer readable program steps to effect providing said third information at said first maximum data transfer rate.

12. The data storage and retrieval system of claim 11, wherein said computer readable program code further comprises a series of computer readable program steps to effect:

providing said third information via said first bus to each of said one or a plurality of input/output devices; and

receiving said fourth information via said first bus from each of said one or a plurality of input/output devices.

13. The data storage and retrieval system of claim 12, wherein said data retrieval system further comprises a second bus having a second maximum data transfer rate, wherein said computer readable program code further comprises a series of computer readable program steps to effect:

providing fifth information via said second bus to said one of said one or a plurality of input/output devices;

receiving sixth information via said second bus from said one of said one or a plurality of input/output devices;

analyzing said sixth information; and

evaluating the performance of said second bus.

14. The data storage and retrieval system of claim 13, wherein said fifth information is selected from the group consisting of connect commands, disconnect commands, and combinations thereof.

15. The data storage and retrieval system of claim 14, wherein said computer readable program code further comprises a series of computer readable program steps to effect:

providing said fifth information via said second bus to each of said one or a plurality of input/output devices; and

receiving said sixth information via said second bus from each of said one or a plurality of input/output devices.

16. A computer program product usable with a programmable computer processor having computer readable program code embodied therein for evaluating the performance of input/output devices and interconnecting buses disposed within a data storage and retrieval system, wherein said data storage and retrieval system comprises a host computer, one or a plurality of input/output devices, a first bus having a first maximum data transfer rate connecting said host computer to each of said one or a plurality of input/output devices, first information comprising one or more valid system configurations, and second information comprising an apparent system configuration, comprising:

computer readable program code which causes said programmable computer processor to provide third information via said first bus to one of said one or plurality of input/output devices;

computer readable program code which causes said programmable computer processor to receive fourth information via said first bus from said one of said one or plurality of input/output devices;

computer readable program code which causes said programmable computer processor to analyze said fourth information;

computer readable program code which causes said programmable computer processor to evaluate the performance of said one of said one or a plurality of input/output devices; and

,

computer readable program code which causes said programmable computer processor to evaluate the performance of said first bus;

wherein said third information comprises connect commands, disconnect commands, and combinations thereof.

17. The computer program product of claim 16, further comprising computer readable program code which causes said programmable computer processor to provide said third information at said first maximum data transfer rate.

18. The computer program product of claim 17, further comprising:

computer readable program code which causes said programmable computer processor to provide said third information via said first bus to each of said one or a plurality of input/output devices; and

computer readable program code which causes said programmable computer processor to receive said fourth information via said first bus from each of said one or a plurality of input/output devices.

19. The computer program product of claim 18, wherein said data retrieval system further comprises a second bus having a second maximum data transfer rate, further comprising:

computer readable program code which causes said programmable computer processor to provide fifth information via said second bus to said one of said one or a plurality of input/output devices;

computer readable program code which causes said programmable computer processor to receive sixth information via said second bus from said one of said one or a plurality of input/output devices;

computer readable program code which causes said programmable computer processor to analyze said sixth information; and

computer readable program code which causes said programmable computer processor to evaluate the performance of said second bus;

wherein said fifth information is selected from the group consisting of connect commands, disconnect commands, and combinations thereof.

20. The computer program product of claim 19, further comprising:

computer readable program code which causes said programmable computer processor to provide said fifth information via said second bus to each of said one or a plurality of input/output devices; and

computer readable program code which causes said programmable computer processor to receive said sixth information via said second bus from each of said one or a plurality of input/output devices.