Digital filter
First Claim
1. A digital filter comprising:
- a control unit for generating and outputting a mode selection signal through which the operations of a real valued filter and a complex valued filter are determined, and an operation selection signal for controlling corresponding operators perform the operations twice for a clock (clk);
a data input unit for selecting an input real valued data and an input imaginary valued data according to the mode selection signal, delaying the data, respectively, selecting the input data and delayed data again according to the mode selection signal and the operation selection signal, and outputting the selected data for coefficient update and filter output;
a first coefficient update unit for multiplying the selected output data from the data input unit by an error value that is selected according to the mode selection signal and the operation selection signal, adding the multiplication result to an old coefficient that is selected according to the mode selection signal and the operation selection signal and thereby, updating two coefficients of the real valued filter and a real coefficient of the complex valued filter within one clock;
a second coefficient update unit for multiplying the selected output data from the data input unit by an error value that is selected according to the mode selection signal and the operation selection signal, adding the multiplication result to an old coefficient that is selected according to the mode selection signal and the operation selection signal and thereby, updating two coefficients of the real valued filter and a real coefficient of the complex valued filter within one clock;
a first filter output unit for multiplying two data selectively outputted from the data input unit for a clock by the two coefficients of the real valued filter or the real coefficient of the complex valued filter provided from the first coefficient update unit and thereby, generating two tap outputs of the real valued filter or two outputs of the complex valued filter; and
a second filter output unit for multiplying two data selectively outputted from the data input unit for a clock by the two coefficients of the real valued filter or the real coefficient of the complex valued filter provided from the second coefficient update unit and thereby, generating two tap outputs of the real valued filter or two outputs of the complex valued filter.
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Accused Products
Abstract
Disclosed is a digital filter with a combined architecture of a 4-tap real valued filter and a-tap complex valued filter, whereby the filter size is reduced and no output delay is occurred due to the filter operations. According to the present invention, the digital filter is operated either in real valued filter mode or complex valued filter mode according to a mode selection signal, a filter output is obtained within one clock according to an operation selection signal, and an operator performs operations twice within one symbol clock (i.e., a time period) unlike a related art filter in which an operator performs the operation only once for each symbol clock. Therefore, the present invention filter is capable of resolving the filter size problem by substantially reducing the number of multipliers and adders.
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Citations
26 Claims
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1. A digital filter comprising:
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a control unit for generating and outputting a mode selection signal through which the operations of a real valued filter and a complex valued filter are determined, and an operation selection signal for controlling corresponding operators perform the operations twice for a clock (clk);
a data input unit for selecting an input real valued data and an input imaginary valued data according to the mode selection signal, delaying the data, respectively, selecting the input data and delayed data again according to the mode selection signal and the operation selection signal, and outputting the selected data for coefficient update and filter output;
a first coefficient update unit for multiplying the selected output data from the data input unit by an error value that is selected according to the mode selection signal and the operation selection signal, adding the multiplication result to an old coefficient that is selected according to the mode selection signal and the operation selection signal and thereby, updating two coefficients of the real valued filter and a real coefficient of the complex valued filter within one clock;
a second coefficient update unit for multiplying the selected output data from the data input unit by an error value that is selected according to the mode selection signal and the operation selection signal, adding the multiplication result to an old coefficient that is selected according to the mode selection signal and the operation selection signal and thereby, updating two coefficients of the real valued filter and a real coefficient of the complex valued filter within one clock;
a first filter output unit for multiplying two data selectively outputted from the data input unit for a clock by the two coefficients of the real valued filter or the real coefficient of the complex valued filter provided from the first coefficient update unit and thereby, generating two tap outputs of the real valued filter or two outputs of the complex valued filter; and
a second filter output unit for multiplying two data selectively outputted from the data input unit for a clock by the two coefficients of the real valued filter or the real coefficient of the complex valued filter provided from the second coefficient update unit and thereby, generating two tap outputs of the real valued filter or two outputs of the complex valued filter. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A digital filter comprising:
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a control unit for generating and outputting a mode selection signal through which the operations of a real valued filter and a complex valued filter are determined, and an operation selection signal for controlling corresponding operators perform the operations twice for a clock (clk);
a data input unit for selecting an input real valued data and an input imaginary valued data according to the mode selection signal, delaying the data, respectively, selecting the input data and delayed data again according to the mode selection signal and the operation selection signal, and outputting the selected data for coefficient update and filter output;
a first coefficient update unit for multiplying the selected output data from the data input unit by an error value that is selected according to the mode selection signal and the operation selection signal, adding the multiplication result to an old coefficient that is selected according to the mode selection signal and the operation selection signal and thereby, updating two coefficients of the real valued filter and a real coefficient of the complex valued filter within one clock;
a second coefficient update unit for multiplying the selected output data from the data input unit by an error value that is selected according to the mode selection signal and the operation selection signal, adding the multiplication result to an old coefficient that is selected according to the mode selection signal and the operation selection signal and thereby, updating two coefficients of the real valued filter and a real coefficient of the complex valued filter within one clock;
a first filter output unit for multiplying two data selectively outputted from the data input unit for a clock by the two coefficients of the real valued filter or the real coefficient of the complex valued filter provided from the first coefficient update unit and thereby, generating two tap outputs of the real valued filter or two outputs of the complex valued filter;
a second filter output unit for multiplying two data selectively outputted from the data input unit for a clock by the two coefficients of the real valued filter or the real coefficient of the complex valued filter provided from the second coefficient update unit and thereby, generating two tap outputs of the real valued filter or two outputs of the complex valued filter; and
a final output unit for producing a final output of a 1-tap real valued filter by adding all the outputs from the first and second filter output units if the mode selection signal indicates that the digital filter is in real valued filter mode, and producing a final output of a 1-tap complex valued filter, the final output being composed of a real valued output and an imaginary valued output, by adding or subtracting the outputs from the first and second output units together. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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Specification