Signal processing with look-ahead modulator noise quantization minimization

• US 20050156766A1
• Filed: 07/28/2004
• Published: 07/21/2005
• Est. Priority Date: 01/16/2004
• Status: Active Grant

• Current Assignee: Cirrus Logic Incorporated
• Original Assignee: Cirrus Logic Incorporated
• Inventors: Melanson, John L.
• Granted Patent: US 7,196,647 B2
• Time in Patent Office: Days
• US Class Current: 341/143
• CPC Class Codes: H03M 7/3011 of non-linear distortion, e.g. by temporarily adapting the operation upon detection of instability conditions avoiding instability by structural design H03M7/3035
• CPC Class Codes: H03M 7/3026 the quantiser being a multiple bit one

Abstract

A signal processing system includes a look-ahead delta-sigma modulator that processes multiple output candidate vectors and an input vector to determine a quantization error vector for each output candidate vector. In one embodiment, the quantization error vector represents a difference between a cost value vector and an input candidate vector. Look-ahead delta-sigma modulator output values are selected using the quantization error vectors by, for example, determining the minimum power quantization error vector for each input vector X and selecting the output value from the input candidate vector associated with the minimum power quantization error vector. Quantization error vectors can also be weighted using a non-uniform weighting vector.

Claims

1. A look-ahead delta-sigma modulator comprising:

a digital filter to filter data derived from input signal data and respective elements of delayed output candidate vectors to generate filter output vectors, wherein the digital filter includes state variables that are updated via feedback of a selected output value;

a quantization error generator, coupled to the digital filter to receive the filter output vectors, to determine a set of quantization error vectors from each set of M element modulator output candidate vectors and the filter output vectors, wherein M is greater than one and each element in the output candidate vectors is a potential output value of the delta-sigma modulator; and

an output generator to select from each set of quantization error vectors a quantization error vector associated with a modulator output candidate vector and to select an output from the associated modulator output candidate vector.

2. The delta-sigma modulator of claim 1 wherein the quantization error generator determines one quantization error vector for each output candidate vector.

3. The delta-sigma modulator of claim 1 further comprising a recording system to store output values generated by the output value generator.

4. The delta-sigma modulator of claim 1 further comprising a storage medium having the output values encoded thereon.

5. The delta-sigma modulator of claim 1 further comprising a storage medium having data derived from output values encoded thereon.

6. The delta-sigma modulator of claim 1 wherein the set of quantization error vectors determined by the error generator equals 2^M.

7. The delta-sigma modulator of claim 1 wherein the set of quantization error vectors determined by the error generator is a non-redundant set and contains less than 2^M quantization error vectors.

8. The delta-sigma modulator of claim 1 wherein each element of each modulator output candidate vector has two possible values.

9. The delta-sigma modulator of claim 1 wherein the delta-sigma modulator is a Trellis type delta-sigma modulator.

10. The delta-sigma modulator of claim 1 wherein the delta-sigma modulator is a tree-based delta-sigma modulator.

11. The delta-sigma modulator of claim 1 wherein a set of Y output values most closely represent a corresponding set of Y input values in a signal band of interest, wherein Y is a positive integer.

12. The delta-sigma modulator of claim 11 wherein each output value represents a leading bit of each modulator output candidate associated with each identified quantization error vector.

14. The delta-sigma modulator of claim 1 wherein the delta-sigma modulator is implemented using software.

15. The delta-sigma modulator of claim 1 further comprising:

a quantizer, wherein an i^th quantization error vector in the set of quantization error vectors comprises a difference between an i^th digital filter output data vector C_i and an i^th modulator output candidate vector Y_i, wherein the vector C_i represents an i^th M-element vector derived from a difference between the look-ahead delta-sigma modulator input vector and an i^th M-element delayed output candidate vector Y_Di.

16. The delta-sigma modulator of claim 15 wherein the i^th quantization error vector comprises cost value vector C_i-output candidate vector Y_i.

17. The delta-sigma modulator of claim 1 wherein each cost value vector comprises a difference between an i^th quantizer input vector and the i^th modulator output candidate vector.

18. The delta-sigma modulator of claim 1 further comprising:

a weighting module to non-uniformly weight each quantization error vector with a weight vector.

24. The delta-sigma modulator of claim 1 wherein the output selected by the output generator comprises r output values, wherein r is any integer between 1 and M.

13. The delta-sigma modulator of claim 111 wherein the quantization error vector associated with the modulator output candidate vector from which the output value is selected is the quantization error vector having a minimum power in comparison to the remaining quantization error vectors in the set.

19. The delta-sigma modulator of 18 wherein the weight vector includes at least one non-zero weight element that is different from another non-zero weight element

20. The delta sigma modulator of claim 19 wherein magnitudes of each non-zero weight element of the weight vector trend downward as a lookahead depth of the error values increase.

21. The delta sigma modulator of claim 20 wherein the magnitudes of each non-zero weight element of the weight vector decrease linearly.

22. The delta sigma modulator of claim 20 wherein the magnitudes of each non-zero weight element of the weight vector decrease exponentially.

23. The delta sigma modulator of claim 20 wherein the weight vector that includes elements [w₀, w₁, w₂, w₃, . . . ], wherein w0, w1, and w2 have magnitudes within approximately +/−

5% of each other and w3 has a magnitude of approximately 80% or less of the magnitude of one of the previous elements.

25. A method of determining output values of a delta-sigma modulator using quantization error vectors, the method comprising:

(a) filtering data derived from input signal data and respective elements of M-element delayed output candidate vectors to generate filter output vectors;

(b) generating quantization error vectors for each set of M element modulator output candidate vectors and each set of M element filter output vectors, wherein M is greater than one and each element in the output candidate vectors is a potential output value of the delta-sigma modulator;

(c) selecting from each set of quantization error vectors a quantization error vector associated with one of the modulator output candidate vectors; and

(d) generating an output from the associated modulator output candidate vector.

26. The method of claim 25 further comprising:

determining a difference between the filter output vectors and output candidate vectors to generate the quantization error vectors;

feeding back each output value to a filter that filters the data derived from input signal data and respective elements of the output candidate vectors; and

updating state variables of the filter with the output values fed back to the filter.

27. The method of claim 25 further comprising generating one quantization error vector for each output candidate vector.

28. The method of claim 25 further comprising repeating (a), (b), and (c) for each of a plurality of input values to the delta-sigma modulator.

29. The method of claim 28 wherein a set of Y output values most closely represent a corresponding set of Y input values in a signal band of interest, wherein Y is a positive integer.

30. The method of claim 25 further comprising:

recording data derived from the output values on storage media.

31. The method of claim 25 further comprising:

recording the output values on a storage media.

32. The method of claim 25 wherein generating quantization error vectors comprises generating 2^M quantization error vectors.

33. The method of claim 25 wherein generating quantization error vectors comprises generating a nonredundant set that contains less than 2^M quantization error vectors.

34. The method of claim 25 wherein each element of each modulator output candidate vector has two possible values.

35. The method of claim 25 wherein the look-ahead delta-sigma modulator is a Trellis type delta-sigma modulator.

36. The method of claim 25 wherein the look-ahead delta-sigma modulator is a tree-based delta-sigma modulator.

37. The method of claim 36 wherein each output value represents a leading bit of each modulator output candidate vector associated with each selected identified quantization error vector.

38. The method of claim 36 wherein:

generating each quantization error vector comprises;

generating a first difference vector by determining a difference between one of the M element modulator output candidate vectors and one of the M element modulator input vectors;

filtering the first difference vector; and

generating a second difference vector by determining a difference between one of the M element modulator output candidate vectors and one of the M element first difference vectors.

39. The method of claim 38 wherein generating an output value from the associated modulator output candidate vector comprises identifying the quantization error vector having a lowest cumulative power in comparison to the remaining quantization error vectors.

40. The method of claim 25 wherein the look-ahead delta-sigma modulator is implemented using software.

41. The method of claim 25 wherein the delta-sigma modulator comprises a quantizer, each vector derived from a difference between look-ahead delta-sigma modulator input and output candidate vectors represents a cost value vector, and each cost value vector comprises a difference between an i^th quantizer input vector and the i^th modulator output candidate vector.

42. The method of claim 41 wherein the i^th quantizer input vector comprises a filtered difference between the modulator input vector and the i^th modulator output candidate vector.

43. The method of claim 25 further comprising:

weighting in the time-domain at least two elements of the quantization error vectors with different, non-zero weights.

44. The method of claim 43 wherein weighting in the time-domain at least two elements of the quantization error vectors comprises computing a dot product of each error vector and a weight vector.

45. The method of claim 43 wherein weighting in the time-domain at least two elements of the quantization error vectors comprises weighting with a weight vector having non-zero elements that trend downward as a lookahead depth of the error values increase.

46. The method of claim 43 wherein weighting in the time-domain at least two elements of the quantization error vectors comprises weighting with a weight vector having non-zero elements that decrease linearly.

47. The method of claim 43 wherein weighting in the time-domain at least two elements of the quantization error vectors comprises weighting with a weight vector having non-zero elements that decrease exponentially.

48. The method of claim 43 wherein weighting in the time-domain at least two elements of the quantization error vectors comprises weighting with a weight vector that includes elements [w₀, w₁, w₂, W₃, . . . ], wherein w0, w1, and w2 have magnitudes within approximately +/−

5% of each other and w3 has a magnitude of approximately 80% or less of the magnitude of one of the previous elements.

49. The method of claim 43 wherein weighting in the time-domain at least two elements of the quantization error vectors comprises weighting with a weight vector having elements that remain the same for each set of M modulator output candidates.

50. The method of claim 25 wherein the generated output comprises r output values, wherein r is any integer between 1 and M.

51. A signal processing system comprising:

an M-depth delta-sigma modulator delta-sigma modulator to determine output values from respective sets of M element modulator output candidate vectors using quantization error vectors, wherein M is greater than one, each element in the output candidate vectors is a potential output value of the delta-sigma modulator.

52. The signal processing system of claim 51 further comprising:

a first difference module to determine difference vectors corresponding to a difference between an input vector and the set of delayed modulator output candidate vectors; and

a digital filter to determine a filter output vector from each difference vector; and

a second difference module to determine quantization error vectors, wherein the i^th quantization error vector corresponds to a difference between an i^th filter output vector and an i^th modulator output candidate vectors.

53. The signal processing system of claim 51 further comprising:

a storage medium encoded with the output values.

54. A method of determining an output signal using an M-depth delta-sigma modulator and quantization error vectors, wherein M is greater than one and each element in the output candidate vectors is a potential output value of the delta-sigma modulator, the method comprising:

processing an input signal vector and a set of delayed output candidate vectors;

for each processed input signal vector and delayed output candidate vector, computing a quantization error vector from the processed input signal vector and delayed output candidate vector;

processing each quantization error vector to identify the output candidate vector that best matches the input signal vector; and

selecting an output from the output candidate vector that best matches the input signal vector.

55. The method of claim 54 wherein processing an input signal vector and a set of delayed output candidate vectors comprises:

filtering a difference between the input signal vector and the set of delayed output candidate vectors.

56. A method of processing a signal using a delta-sigma modulator, the method comprising:

determining output values of an M-depth delta-sigma modulator from respective sets of M element modulator output candidate vectors and an M element modulator input vector using quantization error vectors, wherein M is greater than one, each element in the output candidate vectors is a potential output value of the delta-sigma modulator.