Measurement and compensation of errors in interferometers

• US 20050157309A1
• Filed: 11/10/2004
• Published: 07/21/2005
• Est. Priority Date: 09/09/2002
• Status: Active Grant

• Current Assignee: Zygo Corporation (Ametek Incorporated)
• Original Assignee: Zygo Corporation (Ametek Incorporated)
• Inventors: Hill, Henry A.
• Granted Patent: US 7,274,462 B2
• Time in Patent Office: Days
• US Class Current: 356/508
• CPC Class Codes: G01B 11/02 for measuring length, width or thickness G01B11/08 takes precedence
• CPC Class Codes: G01B 2290/45 Multiple detectors for detecting interferometer signals
• CPC Class Codes: G01B 2290/70 Using polarization in the interferometer
• CPC Class Codes: G01B 9/02021 contacting different faces of object, e.g. opposite faces
• CPC Class Codes: G01B 9/02027 Two or more interferometric channels or interferometers
• CPC Class Codes: G01B 9/02072 by calibration or testing of interferometer
• CPC Class Codes: G03F 7/70775 Position control, e.g. interferometers or encoders for determining the stage position
• CPC Class Codes: G03F 9/7003 Alignment type or strategy, e.g. leveling, global alignment
• CPC Class Codes: G03F 9/7049 Technique, e.g. interferometric

Abstract

In general, in one aspect, the invention features a method for determining the location of an alignment mark on a stage including measuring a location, x₁, of a stage along a first measurement axis using an interferometry system, measuring a location, x₂, of the stage along a second measurement axis parallel to the first measurement axis, and determining a location of the alignment mark along a third axis parallel to the first measurement axis based on x₁, x₂, and a correction term, ψ₃, calculated from predetermined information including information characterizing imperfections in the interferometry system determined using the interferometry system and the stage.

Claims

1. A method for determining the location of an alignment mark on a stage using an interferometry system, the method comprising:

measuring a location, x₁, of a stage along a first measurement axis using the interferometry system;

measuring a location, x₂, of the stage along a second measurement axis; and

determining a location of the alignment mark along a third axis based on x₁, x₂, and a correction term, ψ

₃, calculated from predetermined information comprising information characterizing imperfections in the interferometry system determined using the interferometry system and the stage.

2. The method of claim 1, wherein the second measurement axis is parallel to the first measurement axis.

3. The method of claim 1, wherein the third axis is parallel to the first measurement axis.

4. The method of claim 1, wherein x₁ and x₂ correspond to the location of a mirror at the first and second measurement axes, respectively.

5. The method of claim 4, wherein information characterizing imperfections in the interferometry system is determined by monitoring the location of the stage using the interferometry system during a calibration procedure.

6. The method of claim 5, wherein the calibration procedure comprises monitoring x₁ and x₂ while scanning the stage along a path non-parallel to the first measurement axis.

7. The method of claim 6, wherein the calibration procedure further comprises characterizing surface variations of the mirror based on x₁ and x₂ monitored while scanning the stage along the path non-parallel to the first measurement axis.

8. The method of claim 7, wherein the path non-parallel to the first measurement axis is orthogonal to the first measurement axis.

9. The method of claim 7, wherein the calibration procedure further comprises determining an error term associated with the interferometer based on x₁ and x₂ monitored while scanning the stage along another path.

10. The method of claim 9, wherein the other path is parallel to the first measurement axis.

11. The method of claim 7, wherein the calibration procedure further comprises monitoring the location of the stage along a third measurement axis and a fourth measurement axis using the interferometry system, wherein the third and fourth measurement axes are non-parallel to the first measurement axis.

12. The method of claim 11, wherein the third and fourth measurement axes are orthogonal to the first measurement axis.

13. The method of claim 11, wherein the location of the stage along the third and fourth measurement axes correspond to the location of a second mirror along the third and fourth measurement axes.

14. The method of claim 13, wherein the calibration procedure further comprises characterizing surface variations of the second mirror based on the locations of the mirror along the third and fourth measurement axes monitored while scanning the stage along a path.

15. The method of claim 14, wherein the path is parallel to the first measurement axis.

16. The method of claim 14, wherein the calibration procedure further comprises determining an error term associated with the interferometer based on x₁ and x₂ monitored while scanning the stage along the path and the characterized surface variations of the second mirror.

17. The method of claim 1, wherein the information characterizing imperfections in the interferometry system comprises a differential mode error term associated with the interferometer.

18. The method of claim 4, wherein the information characterizing imperfections in the interferometry system comprises a differential mode error term associated with the mirror.

40. A lithography method for use in fabricating integrated circuits on a wafer, the method comprising:

supporting the wafer on a moveable stage;

imaging spatially patterned radiation onto the wafer;

adjusting the position of the stage; and

monitoring the position of the stage using the method of claim 1.

41. A lithography method for use in the fabrication of integrated circuits comprising:

directing input radiation through a mask to produce spatially patterned radiation;

positioning the mask relative to the input radiation;

monitoring the position of the mask relative to the input radiation using the method of claim 1;

and

imaging the spatially patterned radiation onto a wafer.

42. A lithography method for fabricating integrated circuits on a wafer comprising:

positioning a first component of a lithography system relative to a second component of a lithography system to expose the wafer to spatially patterned radiation; and

monitoring the position of the first component relative to the second component using the method of claim 1.

43. A method for fabricating integrated circuits, the method comprising the lithography method of claim 42.

44. A method for fabricating integrated circuits, the method comprising the lithography method of claim 42.

45. A method for fabricating integrated circuits, the method comprising the lithography method of claim 42.

48. A method for fabricating a lithography mask, the method comprising:

directing a write beam to a substrate to pattern the substrate;

positioning the substrate relative to the write beam; and

monitoring the position of the substrate relative to the write beam using the method of claim 1.

19. A method, comprising:

monitoring the location of a stage along a first measurement axis using an interferometry system while scanning the stage along one or more paths;

monitoring the location of the state along a second measurement axis non-parallel to the first measurement axis using the interferometry system while scanning the stage along the one or more paths; and

determining information related to imperfections in the interferometry system based on the monitored locations.

20. The method of claim 19, wherein the location of the stage along the first measurement axis corresponds to the location of a first mirror along the first measurement object.

21. The method of claim 20, wherein one of the scanned paths is non-parallel to the first measurement axis.

22. The method of claim 21, wherein determining information comprises characterizing errors due surface variations of the first mirror based on the monitored locations of the stage while scanning the stage along the path non-parallel to the first measurement axis.

23. The method of claim 19, wherein the location of the stage along the second measurement axis corresponds to the location of a second mirror along the second measurement object.

24. The method of claim 23, wherein one of the paths is non-parallel to the second measurement axis.

25. The method of claim 24, wherein the one path is parallel to the first measurement axis.

26. The method of claim 24, wherein determining information comprises characterizing errors due to surface variations of the second mirror based on the monitored locations of the stage while scanning the stage along the path non-parallel to the second measurement axis.

27. The method of claim 24, wherein determining information comprises characterizing errors due to imperfections in an interferometer of the interferometry system based on the monitored locations of the stage while scanning the stage along the path non-parallel to the second measurement axis.

29. The method of claim 19, wherein imperfections in the interferometry system comprise variations in the surface of a mirror used in the interferometry system.

30. The method of claim 29, wherein the information related to imperfections in the interferometry system comprises a differential mode error term associated with the mirror.

31. The method of claim 30, wherein the information related to imperfections in the interferometry system comprises a common mode error term associated with the mirror.

32. The method of claim 19, wherein imperfections in the interferometry system comprise imperfections in an interferometer used in the interferometry system.

33. The method of claim 32, wherein the information related to imperfections in the interferometry system comprises a differential mode error term associated with the interferometer.

28. The method of 27, wherein the interferometer is used to monitor the location of the stage along the first measurement axis.

34. An interferometry system, comprising:

an interferometer configured to monitor a location, xi, of a stage along a first axis; and

an electronic controller coupled to the interferometer, wherein during operation the electronic controller determines a location of the stage along a third axis based on x₁, a location, x₂, of the stage along a second axis and a correction term, ψ

₃, calculated from predetermined information comprising information characterizing imperfections in the interferometry system determined using the interferometry system and the stage.

35. The interferometry system of claim 34, wherein the electronic controller is configured to acquire the information characterizing imperfections in the interferometry system during a calibration procedure.

37. A lithography system for use in fabricating integrated circuits on a wafer, the system comprising:

a stage for supporting the wafer;

an illumination system for imaging spatially patterned radiation onto the wafer;

a positioning system for adjusting the position of the stage relative to the imaged radiation; and

the apparatus of claim 34 for monitoring the position of the wafer relative to the imaged radiation.

38. A lithography system for use in fabricating integrated circuits on a wafer, the system comprising:

a stage for supporting the wafer; and

an illumination system including a radiation source, a mask, a positioning system, a lens assembly, and the apparatus of claim 34,

wherein during operation the source directs radiation through the mask to produce spatially patterned radiation, the positioning system adjusts the position of the mask relative to the radiation from the source, the lens assembly images the spatially patterned radiation onto the wafer, and the apparatus monitors the position of the mask relative to the radiation from the source.

39. A beam writing system for use in fabricating a lithography mask, the system comprising:

a source providing a write beam to pattern a substrate;

a stage supporting the substrate;

a beam directing assembly for delivering the write beam to the substrate;

a positioning system for positioning the stage and beam directing assembly relative one another; and

the apparatus of claim 34 for monitoring the position of the stage relative to the beam directing assembly.

46. A method for fabricating integrated circuits, the method comprising using the lithography system of claim 37.

47. A method for fabricating integrated circuits, the method comprising using the lithography system of claim 38.

36. An interferometry system, comprising:

a first interferometer configured to monitor the location of a stage along a first measurement axis;

a second interferometer configured to monitor the location of the stage along a second measurement axis non-parallel to the first measurement axis; and

an electronic controller coupled to the first and second interferometers and configured to monitor the location of the stage along the first and second measurement axes while the stage is scanned along one or more paths, and to determine information related to imperfections in the interferometry system based on the monitored locations.