METHOD OF MAKING TOROIDAL MRAM CELLS
First Claim
1. A method of making toroidal magnetic memory cells comprising:
- providing at least one first conductor;
depositing a hard layer of material upon the first conductor;
forming from the hard layer at least one pillar;
depositing a ferromagnetic material about the pillar;
forming an annular data layer from the ferromagnetic material about the pillar;
depositing a junction stack upon at least a portion of the data layer;
depositing a dielectric upon the junction stack; and
planarizing the dielectric to expose the at least one pillar.
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Accused Products
Abstract
This invention provides a method of making nano-scaled toroidal magnetic memory cells, such as may be used, for example, in magnetic random access memory (MRAM). In a particular embodiment a semiconductor wafer substrate is prepared and a conductor layer is provided upon the wafer. A hard layer is deposited upon the first conductor. From the hard layer, ion etching is employed to form an annular wall about a pillar, the wall and pillar defining an annular slot. A ferromagnetic data layer is deposited within the annular slot and a junction stack is then provided upon at least a portion of the data layer. A dielectric is applied to insulate the structure and then planarized to expose the pillar.
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Citations
45 Claims
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1. A method of making toroidal magnetic memory cells comprising:
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providing at least one first conductor;
depositing a hard layer of material upon the first conductor;
forming from the hard layer at least one pillar;
depositing a ferromagnetic material about the pillar;
forming an annular data layer from the ferromagnetic material about the pillar;
depositing a junction stack upon at least a portion of the data layer;
depositing a dielectric upon the junction stack; and
planarizing the dielectric to expose the at least one pillar. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A method of making toroidal magnetic memory cells comprising:
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providing a wafer substrate;
providing at least one first conductor upon the wafer substrate, depositing a hard layer of material upon the first conductor;
forming from the hard layer at least one pillar;
forming from the hard layer at least one substantially annular wall about each pillar, the annular wall about the pillar defining a substantially annular slot;
depositing a ferromagnetic data layer within the annular slot;
depositing a junction stack upon at least a portion of the data layer;
depositing a dielectric upon the junction stack to insulate the junction stack; and
planarizing the dielectric to expose the at least one pillar. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33)
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34. A method of making toroidal magnetic memory cells having a common conductor, a read conductor and a write conductor, comprising:
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depositing at least one common conductive layer upon a wafer substrate;
depositing a hard layer of material upon the common conductor layer;
depositing a photoresist upon the material layer to provide at least two areas of photoresist protected material, the first an annular ring concentric about a second protected area, the photoresist being developed to remove the photoresist from the non-protected area, thereby exposing at least one portion of the material layer;
ion etching about the remaining photoresist to substantially remove at least a portion of the exposed portion of the material layer, the second protected area defining a pillar, the first protected area defining a substantially annular wall concentric about the pillar, the wall further defining a substantially annular slot about the pillar;
depositing a ferromagnetic data layer within the annular slot;
depositing a junction stack upon at least a portion of the data layer;
removing the annular wall from around the data layer;
depositing a dielectric upon the junction stack to insulate the junction stack;
planarizing the dielectric to expose the at least one pillar;
depositing a read conductor in electrical contact with the junction stack;
wherein the pillar occupies the position of the write conductor, passing through the data layer and in electrical contact with the common conductive layer. - View Dependent Claims (35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45)
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Specification