Radiation detector

• US 20050158906A1
• Filed: 03/04/2005
• Published: 07/21/2005
• Est. Priority Date: 04/28/2000
• Status: Active Grant

• Current Assignee: Shimadzu Corporation
• Original Assignee: Shimadzu Corporation
• Inventors: Sato, Toshiyuki, Tokuda, Satoshi
• Granted Patent: US 7,498,189 B2
• Time in Patent Office: Days
• US Class Current: 438/48
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14665 Imagers using a photoconductor layer
• CPC Class Codes: H04N 25/30 for transforming X-rays into image signals
• CPC Class Codes: H04N 5/32 Transforming X-rays cameras or camera modules for generating image signals from X-rays H04N23/30; circuitry of SSIS for transforming X-rays into image signals H04N25/30

Abstract

In a method of producing a radiation detector, an active matrix board is formed to include gate lines and data lines arranged in a two-dimensional lattice shape, a plurality of high-speed switching elements provided to respective lattice points and connected to the gate lines and the data lines, picture element electrodes connected to source electrodes of the high-speed switching elements, and charge storage capacitances disposed between the picture element electrodes and ground on a insulating base plate. Then, a converting layer is formed at upper portions of the respective picture element electrodes at a temperature between 300° C. and 800° C. to generate a pair of electron-hole by absorbing light or radiation. The active matrix board is formed of a poly-silicon process board.

Claims

1. A method of producing a radiation detector comprising:

forming an active matrix board including gate lines and data lines arrayed in a two-dimensional lattice shape, a plurality of high-speed switching elements provided at respective lattice points and connected to the gate lines and the data lines, each switching element being formed of polycrystalline silicon thin film transistor and having a source electrode, pixel electrodes connected to the source electrodes of the high-speed switching elements, and charge storage capacitances, each being disposed between the pixel electrode and a ground electrode, and

forming a converting layer on the pixel electrodes at a temperature between 300°

C. and 800°

C. to generate a pair of electron-hole by absorbing light or radiation.

2. A method according to claim 1, wherein said converting layer is a polycrystalline film formed of CdTe or CdZnTe.

3. A method according to claim 2, wherein said polycrystalline silicon thin film transistor has a heat resistance temperature more than 300°

C.

4. A method according to claim 1, wherein the active matrix board is formed such that a silicon dioxide film is formed on a base plate surface;

a silicon nitride film is further formed thereon;

the silicon nitride film in a region other than a transistor region on the base plate surface is removed;

an ion implantation for a channel stopping is carried out, which is then subject to a thermal oxidation to grow a field oxide film thicker than 500 nm on the region where the silicon nitride film is removed;

the oxide film and nitride film are removed;

a gate oxide film of the order of 20 to 40 nm is formed;

the oxide film is partly removed as a mask, and n⁺ ion is applied thereon with polycrystalline silicon to form the source and drain regions;

a thick oxide film or PSG is formed; and

electrodes for the source and drain are formed.

5. A method according to claim 4, wherein in forming the converting layer on the active matrix board, the active matrix board is covered by a silicon nitride film and an insulation protective film of an organic-series resin except for pixel electrodes;

after portions where the films are not required are masked, the active matrix board is set on a film forming device; and

the polycrystalline film of CdTe or CdZnTe for the converting layer is formed.