Method and system for machine memory power and availability management in a processing system supporting multiple virtual machines

• US 20050160151A1
• Filed: 12/17/2003
• Published: 07/21/2005
• Est. Priority Date: 12/17/2003
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Rawson, Freeman Deigh III
• Granted Patent: US 7,356,665 B2
• Time in Patent Office: Days
• US Class Current: 709/213
• CPC Class Codes: G06F 1/3275 Power saving in memory, e.g. RAM, cache
• CPC Class Codes: G06F 11/0712 in a virtual computing platform, e.g. logically partitioned systems
• CPC Class Codes: G06F 11/073 in a memory management context, e.g. virtual memory or cache management memory management G06F12/00; testing of static memory units G11C29/00
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40
• CPC Class Codes: G06F 12/0882 Page mode
• CPC Class Codes: G06F 12/109 for multiple virtual address spaces, e.g. segmentation G06F12/1036 takes precedence
• CPC Class Codes: G06F 12/12 Replacement control
• CPC Class Codes: G06F 9/45537 Provision of facilities of other operating environments, e.g. WINE I/O emulation G06F13/105
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

A method and system for machine memory power and availability management in a processing system supporting multiple virtual machines provides a mechanism for supporting memory power management and memory failure management in large scale systems. Upon a decision to take a memory module off-line or place the module in an increased-latency state for power management, or upon a notification that a memory module has failed or been taken off-line or has had latency increased by another power management control mechanism, a hypervisor that supports multiple virtual machines checks the use of pages by each virtual machine and its guest operating system by using a reverse mapping. The hypervisor determines which virtual machines are using a particular machine memory page and may re-map the machine memory page to another available machine page, or may notify the virtual machines that the memory page has become or is becoming unavailable via a fault or other notification mechanism. Alternatively, or in the absence of a response from a virtual machine, the hypervisor can shut down the affected partition(s).

Claims

1. A method of managing memory in a processing system, said processing system supporting execution of multiple operating system images within multiple virtual machines, said method comprising:

maintaining a reverse mapping structure that maps machine memory blocks within said processing system to physical memory blocks used within each virtual machine, said reverse mapping structure containing an indication for each active machine memory block of each virtual machine using said active machine memory block and one or more associated physical memory blocks within each virtual machine;

determining an availability status of a particular machine memory block;

reading said reverse mapping structure to determine one or more affected virtual machines using said particular machine memory block and associated physical memory blocks for each of said affected virtual machines; and

taking action on each of said one or more affected virtual machines to prevent an unavailability status of said particular machine memory block from causing further failure within said processing system.

2. The method of claim 1, wherein said physical memory blocks are physical memory pages and said machine memory blocks are machine memory pages.

3. The method of claim 1, further comprising detecting a machine memory failure within said processing system, and wherein said determining determines that said particular machine memory block is unavailable due to said machine memory failure.

4. The method of claim 3, wherein said taking action comprises notifying said affected virtual machines of said machine memory failure including providing an indication of associated physical memory blocks for each affected virtual machine in conjunction with said notification.

5. The method of claim 3, wherein said taking action comprises shutting down said affected virtual machines.

6. The method of claim 1, further comprising:

filling another machine memory block with contents that are identical to the proper contents of said particular machine memory block; and

remapping said particular machine memory block to said other machine memory block.

7. The method of claim 1, further comprising receiving a notification that said particular machine memory block is being placed in a power-saving state, and wherein said determining determines that said particular machine memory block is unavailable in response to receipt of said notification.

8. The method of claim 7, wherein said power-saving state is a high-latency state, whereby said unavailability is due to a longer latency for access to said particular machine memory block.

9. The method of claim 7, wherein said taking action comprises notifying said affected virtual machines of unavailability of said associated physical memory blocks in response to receipt of said notification.

10. The method of claim 7, wherein said taking action comprises shutting down said affected virtual machines.

11. A processing system comprising:

a memory for storing program instructions and data;

a processor for executing said program instructions, said program instructions including multiple operating systems executing within multiple virtual machines, wherein said program instructions further comprise hypervisor program instructions for managing said virtual machines, and wherein said hypervisor program instructions comprise program instructions for

maintaining a reverse mapping structure that maps machine memory blocks within said processing system to physical memory blocks used within each virtual machine, said reverse mapping structure containing an indication for each active machine memory block of each virtual machine using said active machine memory block and one or more associated physical memory blocks within each virtual machine;

determining an availability status of a particular machine memory block;

reading said reverse mapping structure to determine one or more affected virtual machines using said particular machine memory block and associated physical memory blocks for each of said affected virtual machines; and

taking action on each of said one or more affected virtual machines to prevent an unavailability status of said particular machine memory block from causing further failure within said processing system.

12. The processing system of claim 11, wherein said physical memory blocks are physical memory pages and said machine memory blocks are machine memory pages.

13. The processing system of claim 11, wherein said hypervisor program instructions further comprise program instructions for receiving an indication of a detected machine memory failure within said processing system, and wherein said hypervisor program instructions for determining determine that said particular machine memory block is unavailable due to said machine memory failure.

14. The processing system of claim 13, wherein said hypervisor program instructions for taking action comprise program instructions for notifying said affected virtual machines of said machine memory failure including providing an indication of associated physical memory blocks for each affected virtual machine in conjunction with said notification.

15. The processing system of claim 13, wherein said hypervisor program instructions for taking action comprise program instructions for shutting down said affected virtual machines.

16. The processing system of claim 11, wherein said hypervisor program instructions for receiving a notification that said particular machine memory block is being placed in a power-saving state, and wherein said hypervisor program instructions for determining determine that said particular machine memory block is unavailable in response to receipt of said notification.

17. The processing system of claim 16, wherein said power-sagint state is a high-latency state, whereby said unavailability is due to a longer latency for access to said particular machine memory block.

18. The processing system of claim 16, wherein said hypervisor program instructions for taking action comprise program instructions for notifying said affected virtual machines of unavailability of said associated physical memory blocks in response to receipt of said notification.

19. The processing system of claim 16, wherein said hypervisor program instructions for taking action comprise program instructions for shutting down said affected virtual machines.

20. The processing system of claim 16, wherein said hypervisor program instructions for taking action comprise program instructions for:

filling another machine memory block with contents that are identical to the proper contents of said particular machine memory block; and

remapping said particular machine memory block to said other machine memory block.

21. A computer program product comprising signal-bearing media encoding program instructions for execution within a processing system supporting execution of multiple operating system images executing within multiple virtual machines, wherein said program instructions comprise hypervisor program instructions for managing said virtual machines, and wherein said hypervisor program instructions comprise program instructions for

maintaining a reverse mapping structure that maps machine memory blocks within said processing system to physical memory blocks used within each virtual machine, said reverse mapping structure containing an indication for each active machine memory block of each virtual machine using said active machine memory block and one or more associated physical memory blocks within each virtual machine;

determining an availability status of a particular machine memory block;

reading said reverse mapping structure to determine one or more affected virtual machines using said particular machine memory block and associated physical memory blocks for each of said affected virtual machines; and

taking action on each of said one or more affected virtual machines to prevent an unavailability status of said particular machine memory block from causing further failure within said processing system.

22. The computer program product of claim 21, wherein said physical memory blocks are physical memory pages and said machine memory blocks are machine memory pages.

23. The computer program product of claim 21, wherein said hypervisor program instructions further comprise program instructions for receiving an indication of a detected machine memory failure within said processing system, and wherein said hypervisor program instructions for determining determine that said particular machine memory block is unavailable due to said machine memory failure.

24. The computer program product of claim 23, wherein said hypervisor program instructions for taking action comprise program instructions for notifying said affected virtual machines of said machine memory failure including providing an indication of associated physical memory blocks for each affected virtual machine in conjunction with said notification.

25. The computer program product of claim 23, wherein said hypervisor program instructions for taking action comprise program instructions for shutting down said affected virtual machines.

26. The computer program product of claim 21, wherein said hypervisor program instructions for receiving a notification that said particular machine memory block is being placed in a power-saving state, and wherein said hypervisor program instructions for determining determine that said particular machine memory block is unavailable in response to receipt of said notification.

27. The computer program produce of claim 26, wherein said power-saving state is a high-latency state, whereby said unavailability is due to a longer latency for access to said particular machine memory block.

28. The computer program product of claim 26, wherein said hypervisor program instructions for taking action comprise program instructions for notifying said affected virtual machines of unavailability of said associated physical memory blocks in response to receipt of said notification.

29. The computer program product of claim 26, wherein said hypervisor program instructions for taking action comprise program instructions for shutting down said affected virtual machines.

30. The computer program product of claim 21, wherein said hypervisor program instructions for taking action comprise program instructions for:

filling another machine memory block with contents that are identical to the proper contents of said particular machine memory block; and

remapping said particular machine memory block to said other machine memory block.