Charge pump for radio frequency data communication device

• US 20050162145A1
• Filed: 12/03/2004
• Published: 07/28/2005
• Est. Priority Date: 04/09/2002
• Status: Active Grant

• Current Assignee: Xueshan Technologies Inc. (Wi-LAN Inc.)
• Original Assignee: MStar Semiconductor Incorporated (MediaTek, Inc.)
• Inventors: Yung, Henry Tin-Hang, Smith, Sterling
• Granted Patent: US 6,999,327 B2
• Time in Patent Office: Days
• US Class Current: 323/312
• CPC Class Codes: G06K 19/0713 the arrangement including a power charge pump
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G11C 5/142 Contactless power supplies, e.g. RF, induction, or IR
• CPC Class Codes: H04B 5/77 for interrogation
• CPC Class Codes: H04B 7/086 using weights depending on external parameters, e.g. direction of arrival [DOA], predetermined weights or beamforming
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

The present invention provides a passive RFID chip with on-chip charge pumps for generating electrical power for the chip from radio frequencies. The passive RFID chip comprises an analog portion and a digital portion. The analog portion primarily comprises a voltage sensor and an AM data detector. The digital portion comprises a state machine digital logic controller. Incoming RF signals enter the chip via external antennas. The RF signals are converted into regulated DC signals by RF-DC converters with the voltage sensor. The RF-DC converters provide power for all the on-chip components and hence the chip does not require external power supply. The incoming RF signals are demodulated by demodulators and enter the AM data detector where the envelope transitions are detected. A voltage alarm is provided to ensure the voltage level does not drop below an operational level of the chip. The logic signals and programming data are controlled by the state machine digital logic controller and the timing signals are provided by an on-chip oscillator.

Claims

1. A charge pump having a plurality of series-connected stages, each of which comprises:

a first diode having an anode connected to an input terminal and a cathode connected to a central terminal;

a second diode having an anode connected to said central terminal and a cathode connected to an output terminal;

a first capacitor connected between said central terminal and an input node;

a second capacitor connected between said output terminal and a reference node; and

a third diode having an anode connected to said output terminal and a cathode connected to an output node.

2. The charge pump as claimed in claim 1, wherein said first diode is implemented by a diode-connected MOS transistor with a low threshold voltage.

3. The charge pump as claimed in claim 2, wherein said MOS transistor is an n-channel MOS transistor.

4. The charge pump as claimed in claim 1, wherein said second diode is implemented by a diode-connected MOS transistor with a low threshold voltage.

5. The charge pump as claimed in claim 4, wherein said MOS transistor is an n-channel MOS transistor.

6. The charge pump as claimed in claim 1, wherein said third diode is implemented by a diode-connected MOS transistor.

7. The charge pump as claimed in claim 6, wherein said MOS transistor is a p-channel MOS transistor.

8. The charge pump as claimed in claim 1, wherein said first capacitor is implemented by a metal-insulator-metal (MIM) capacitor.

9. The charge pump as claimed in claim 1, wherein said second capacitor is implemented by a metal-insulator-metal (MIM) capacitor.

10. The charge pump as claimed in claim 1, further comprising a switch connected between said output terminal of the next last stage and said output node while said switch is controlled by said output terminal of the last stage.

11. The charge pump as claimed in claim 10, wherein said switch is implemented by an n-channel MOS transistor with a low threshold voltage.

12. The charge pump as claimed in claim 11, wherein said n-channel MOS transistor has a drain connected to said output terminal of the next last stage, a source connected to said output node, and a gate connected to said output terminal of the last stage.