Low-noise differential bias circuit and differential signal processing apparatus
First Claim
1. A low-noise differential bias circuit for supplying a low-noise bias current to bases or gates of a pair of differential transistors, the low-noise differential bias circuit comprising:
- a first resistor having a first end being connected to a base or gate of one of the pair of differential transistors;
a second resistor having a first end being connected to a base or gate of the other one of the pair of differential transistors;
a third resistor having a first end being connected to a second end of the first resistor;
a fourth resistor having a first end being connected to a second end of the second resistor;
a first transistor, a second end of the third resistor being connected to a base or gate of the first transistor; and
a second transistor, a second end of the fourth resistor being connected to a base or gate of the second transistor, wherein a direct-current voltage is supplied to a connection point between the first resistor and the third resistor, a connection point between the second resistor and the fourth resistor, a collector or drain of the first transistor, and a collector or drain of the second transistor, from a voltage supply point through a ground element.
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Accused Products
Abstract
A low-noise differential bias circuit is provided which obtains excellent noise characteristics while ensuring excellent distortion characteristics. A collector of a transistor Q11 is connected to a voltage supply point (Vcc) via a resistor R15. A base of the transistor Q11 is connected to a base of a transistor Q1 via resistors R13, R11 connected in series. A connection point between the resistors R11, R13 is connected to the collector of the transistor Q11. A collector of a transistor Q12 is connected to the voltage supply point at connection point A via a resistor R16. A base of the transistor Q12 is connected to a base of a transistor Q2 via resistors R14, R12 connected in series. A connection point between the resistors R12, R14 is connected to the collector of the transistor Q12. By this configuration, a high frequency ground is performed at the connection point A.
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Citations
45 Claims
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1. A low-noise differential bias circuit for supplying a low-noise bias current to bases or gates of a pair of differential transistors, the low-noise differential bias circuit comprising:
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a first resistor having a first end being connected to a base or gate of one of the pair of differential transistors;
a second resistor having a first end being connected to a base or gate of the other one of the pair of differential transistors;
a third resistor having a first end being connected to a second end of the first resistor;
a fourth resistor having a first end being connected to a second end of the second resistor;
a first transistor, a second end of the third resistor being connected to a base or gate of the first transistor; and
a second transistor, a second end of the fourth resistor being connected to a base or gate of the second transistor, wherein a direct-current voltage is supplied to a connection point between the first resistor and the third resistor, a connection point between the second resistor and the fourth resistor, a collector or drain of the first transistor, and a collector or drain of the second transistor, from a voltage supply point through a ground element. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 45)
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14. A differential signal processing apparatus comprising a low-noise differential bias circuit for generating a low-noise bias current;
- and a differential signal processing circuit for performing predetermined differential signal processing, wherein the low-noise differential bias circuit includes;
a first resistor;
a second resistor;
a third resistor having a first end being connected to a first end of the first resistor;
a fourth resistor having a first end being connected to a first end of the second resistor;
a first transistor, a second end of the third resistor being connected to a base or gate of the first transistor; and
a second transistor, a second end of the fourth resistor being connected to a base or gate of the second transistor, wherein a direct-current voltage is supplied to a connection point between the first resistor and the third resistor, a connection point between the second resistor and the fourth resistor, a collector or drain of the first transistor, and a collector or drain of the second transistor, from a voltage supply point through a ground element, and the differential signal processing circuit performs the predetermined differential signal processing using a bias current supplied from a second end of each of the first resistor and the second resistor. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44)
- and a differential signal processing circuit for performing predetermined differential signal processing, wherein the low-noise differential bias circuit includes;
Specification