Method and apparatus for driving multiple peripherals with different clock frequencies in an integrated circuit
First Claim
1. A system for selecting a first peripheral and a second peripheral, the first peripheral receiving a first clock frequency and the second peripheral receiving a second clock frequency, the first and second clock frequencies differing, in an integrated circuit including a processing circuit configured to receive the first clock frequency, transmit a select signal and an address signal, comprising:
- a bridge circuit coupled to the processing circuit, the first peripheral and the second peripheral, and configured to receive the select signal and the address signal and transmit a first peripheral select signal to the first peripheral and a second peripheral select signal to the second peripheral; and
a counter coupled to the bridge circuit and configured to process a count, the count being a predetermined number and based on whether the address signal indicates a first address and the select signal indicates that access is required to the first address, which is associated with the first peripheral, or to a second address, which is associated with the second peripheral, wherein the count differs for the first and second addresses, wherein the bridge circuit asserts the first peripheral and the second peripheral for a period of time based on the value of the count.
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Accused Products
Abstract
The invention is a system for selecting a peripheral, the peripheral receiving a first clock frequency. The invention comprises the following. A processing circuit receives a second clock frequency, where the first and second clock frequencies are different. The processing circuit is configured to transmit a select signal. A bridge circuit is coupled to the processing circuit and the peripheral, and is configured to receive the select signal and transmit a peripheral select signal to the peripheral. The bridge circuit is further configured to receive the second clock frequency but not the first clock frequency. A counter is coupled to the bridge circuit and is configured to process a count, the count being a predetermined number and based on the value of the first frequency.
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Citations
17 Claims
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1. A system for selecting a first peripheral and a second peripheral, the first peripheral receiving a first clock frequency and the second peripheral receiving a second clock frequency, the first and second clock frequencies differing, in an integrated circuit including a processing circuit configured to receive the first clock frequency, transmit a select signal and an address signal, comprising:
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a bridge circuit coupled to the processing circuit, the first peripheral and the second peripheral, and configured to receive the select signal and the address signal and transmit a first peripheral select signal to the first peripheral and a second peripheral select signal to the second peripheral; and
a counter coupled to the bridge circuit and configured to process a count, the count being a predetermined number and based on whether the address signal indicates a first address and the select signal indicates that access is required to the first address, which is associated with the first peripheral, or to a second address, which is associated with the second peripheral, wherein the count differs for the first and second addresses, wherein the bridge circuit asserts the first peripheral and the second peripheral for a period of time based on the value of the count. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of selecting, in an integrated circuit, a first peripheral receiving a first clock cycle and a second peripheral receiving a second clock cycle, the method comprising:
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receiving the first clock cycle in a processing circuit;
transmitting a select signal from the processing circuit;
transmitting an address signal from the processing circuit;
receiving the select and address signals at a bridge circuit, the bridge circuit coupled to the processing circuit, the first peripheral and the second peripheral;
determining whether the address signal is associated with the first or second peripheral;
transmitting a first peripheral select signal to the first peripheral;
processing a first count in a counter, the counter coupled to the bridge circuit, the first count associated with the first peripheral;
transmitting a second peripheral select signal to the second peripheral; and
processing a second count in the counter, the second count associated with the second peripheral, wherein the second count differs from the first count and is predetermined. - View Dependent Claims (14, 15, 16)
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17. A system for selecting a peripheral, the peripheral receiving a first clock frequency, in an integrated circuit comprising:
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a processing circuit configured to receive a second clock frequency and transmit a select signal and an address signal, the first and second clock frequencies differing;
a bridge circuit coupled to the processing circuit and the peripheral, and configured to receive the select and address signals and transmit a peripheral select signal to the peripheral, the bridge circuit further configured to receive the second clock frequency but not the first clock frequency; and
a counter coupled to the bridge circuit and configured to process a count, the count being a predetermined number and based on the value of the first frequency.
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Specification