Method and apparatus for generation of validation tests
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Abstract
A computer system and a computer-implemented method for generating test programs that satisfy at least one termination criterion. The computer system includes a hardware unit to transmit data. A processor is coupled to the hardware unit and to a storage device. The storage device has stored therein at least one algorithm and a plurality of routines. When the processor executes a routine(s), data is generated. The routine causes the processor to access an algorithm, generate a test program, and analyze a test program. A computer implemented method is also disclosed for generating test programs.
31 Citations
45 Claims
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1-20. -20. (canceled)
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21. A method comprising:
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generating a first test program population to test the functionality of an integrated circuit (IC), the first test program population comprising a plurality of test programs, each test program having a first set of instructions and data;
executing each of the test programs in the first test program population;
evaluating a first set of coverage data from the first test program population to determine if the IC has been sufficiently tested, wherein evaluating the first set of coverage data comprises comparing the coverage data to a predetermined coverage requirement; and
generating a second program population if the IC has not been sufficiently tested by the first test program population, the second test program population comprising a plurality of updated test programs, wherein each updated test program is a mutation of a test of the first test program-population for a combination of two or more of the test programs of the first test program population. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29, 30)
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31. A computer system comprising:
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a storage device coupled to a processor and having stored therein at least one routine, which when executed by the processor, causes the processor to generate data, the routine causing the processor to, generate a first test program population to test the functionality of an integrated circuit (IC), the first test program population comprising a plurality of test programs, each test program having a first set of instructions and data;
execute each of the test programs in the first test program population;
evaluate a first set of coverage data from the first test program population to determine if the IC has been sufficiently tested, wherein evaluating the first set of coverage data comprises comparing the coverage data to a predetermined coverage; and
generate a second program population if the IC has not been sufficiently tested by the first test program population, the second test program population comprising a plurality of updated test programs, wherein each updated test program is a mutation of a test of the first test program-population for a combination of two or more of the test programs of the first test program population. - View Dependent Claims (32, 33, 34, 35, 36, 37, 38, 39, 40)
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41. A validation test system comprising:
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a test builder to generate test program populations to test the functionality of an integrated circuit (IC);
a test generator to translate the test program populations into an executable test;
a test analyzer to execute the test program populations; and
a feedback engine to build and update a population of test programs by generating an abstract syntax tree (AST) for each test program populations. - View Dependent Claims (42, 43, 44, 45)
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Specification