High voltage switching devices and process for forming same

• US 20050167697A1
• Filed: 04/30/2003
• Published: 08/04/2005
• Est. Priority Date: 04/30/2002
• Status: Active Grant

• Current Assignee: Wolfspeed, Inc.
• Original Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Inventors: Brandes, George R., Vaudo, Robert P., Flynn, Jeffrey S.
• Granted Patent: US 7,795,707 B2
• Time in Patent Office: Days
• US Class Current: 257/194
• CPC Class Codes: C30B 25/02 Epitaxial-layer growth
• CPC Class Codes: C30B 29/40 AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
• CPC Class Codes: C30B 29/406 Gallium nitride
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/02502 consisting of two layers
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02576 N-type
• CPC Class Codes: H01L 21/02664 Aftertreatments planarisation in general H01L21/304
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/861 Diodes
• CPC Class Codes: H01L 29/868 PIN diodes
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

The present invention relates to various switching device structures including Schottky diode (10), P-N diode, and P-I-N diode, which are characterized by low defect density, low crack density, low pit density and sufficient thickness (>2.5 um) GaN layers (16) of low dopant concentration (<1E16 cm−3) grown on a conductive GaN layer (14). The devices enable substantially higher breakdown voltage on hetero-epitaxial substrates (<2 KV) and extremely high breakdown voltage on homo-epitaxial substrates (>2 KV).

Claims

1. A microelectronic device structure, comprising:

(a) a first conductive GaN base layer having a top surface characterized by a dislocation defect density of not more than about 5×

10⁶/cm²;

(b) a second GaN layer having a dopant concentration of not more than about 1×

10¹⁶/cm³ and a thickness of more than about 10 μ

m, formed over the top surface of said conductive GaN base layer; and

(c) at least one metal contact over said first GaN layer, forming a metal-to-semiconductor junction therewith.

2. The microelectronic device structure of claim 1, wherein said first conductive GaN base layer comprising a free-standing GaN structure.

3. The microelectronic device structure of claim 2, wherein said free-standing GaN structure is formed by steps comprising:

(1) growing a conductive GaN structure on a foreign substrate; and

(2) removing said GaN structure from the foreign substrate, to form said free-standing GaN structure.

4. The microelectronic device structure of claim 3, wherein said first conductive GaN structure is grown on the foreign substrate by hydride vapor phase epitaxy, wherein said first conductive GaN structure is removed from the foreign substrate by separation before formation of the second GaN layer thereon, and wherein the second GaN layer is formed on said first conductive GaN structure by hydride vapor phase epitaxy or metal-organic vapor-phase epitaxy.

5. The microelectronic device structure of claim 3, wherein said first conductive GaN structure is grown on the foreign substrate by hydride vapor phase epitaxy, wherein said first conductive GaN structure is removed from the foreign substrate by separation after formation of the first GaN layer thereon, and wherein the second GaN layer is formed on said conductive GaN structure by hydride vapor phase epitaxy.

6. The microelectronic device structure of claim 2, wherein said first conductive GaN base layer is more than about 50 μ

m in thickness.

7. The microelectronic device structure of claim 2, wherein a first metal contact forms a Schottky contact with said second GaN layer, and wherein a second metal contact forms an ohmic contact with said first conductive GaN base layer.

8. The microelectronic device structure of claim 1, having a breakdown voltage of greater than 2000V.

9. The microelectronic device structure of claim 1, further comprising a sapphire substrate, wherein said first conductive GaN base layer is formed on said sapphire substrate by hydride vapor phase epitaxy (HVPE), and wherein said sapphire substrate and said first conductive GaN base layer forms a HVPE/sapphire base structure.

10. The microelectronic device structure of claim 1, wherein the second GaN layer is doped with germanium.

11. The microelectronic device structure of claim 1, wherein the top surface of said first conductive GaN base layer is undoped, and wherein the second GaN layer is subsequently grown thereupon uniformly, by eliminating dopant or conductivity at the interface of the second GaN layer and the undoped top surface of the first conductive GaN base layer.

46. The microelectronic device structure of claim 1, comprising a Schottky diode selected from the group consisting of mesa-type Schottky diodes and planar-type Schottky diodes.

12. A microelectronic device structure, comprising:

(a) a foreign substrate;

(b) a nucleation buffer layer overlying said foreign substrate;

(c) a first GaN layer overlying said nucleation buffer layer, said first GaN layer having a dopant concentration of not more than about 1×

10¹⁶/cm³;

(d) a second, conductive GaN layer overlying said first GaN layer;

(e) a third GaN layer overlying said second, conductive GaN layer, said third GaN layer having a dopant concentration of not more than about 1×

10¹⁶/cm³ and a thickness of at least about 2.5 μ

m; and

(f) at least one metal contact over said third GaN layer, forming a metal-to-semiconductor junction therewith..

13. The microelectronic device structure of claim 12, wherein said foreign substrate comprises a material selected from the group consisting of sapphire, Si, and SiC.

14. The microelectronic device structure of claim 12, wherein said foreign substrate comprises sapphire.

15. The microelectronic device structure of claim 12, wherein the third GaN layer is less than 10 μ

m in thickness.

16. The microelectronic device structure of claim 12, wherein the third GaN layer is less than 20 μ

m in thickness.

17. The microelectronic device structure of claim 12, wherein the third GaN layer is less than 50 μ

m in thickness.

18. The microelectronic device structure of claim 12, wherein the second, conductive GaN layer is doped with a strain-reducing dopant.

19. The microelectronic device structure of claim 12, wherein the second, conductive GaN layer is doped with germanium.

20. The microelectronic device structure of claim 12, wherein the first GaN layer has a thickness of about 0.6 μ

m, and wherein the second, conductive GaN layer has a thickness of about 2.0 μ

m and a dopant concentration of about 1.5×

10¹⁹/cm³.

21. The microelectronic device structure of claim 12, wherein the first GaN layer has a thickness of about 0.6 μ

m, and wherein the second, conductive GaN layer has a thickness of about 0.5 μ

m and a dopant concentration of about 1.5×

10¹⁹/cm³.

22. The microelectronic device structure of claim 12, wherein said second, conductive GaN layer comprises a first conductive GaN sub-layer of a first dopant concentration and a second conductive GaN sub-layer of a second dopant concentration, wherein said first conductive GaN sub-layer is adjacent to the first GaN layer, wherein said second conductive GaN sub-layer is adjacent to said third GaN layer, and wherein said first dopant concentration is lower than said second dopant concentration.

23. The microelectronic device structure of claim 22, wherein said first GaN layer has a thickness of about 0.6 μ

m, wherein said first conductive GaN sub-layer has a thickness of about 1.9 μ

m and a dopant concentration of about 2.0×

10¹⁸/cm³, and wherein said second conductive GaN sub-layer has a thickness of about 0.1 μ

m and a dopant concentration of about 1.5×

10¹⁹/cm³.

47. The microelectronic device structure of claim 12, comprising a Schottky diode selected from the group consisting of mesa-type Schottky diodes and planar-type Schottky diodes.

24. A microelectronic device structure, comprising:

(a) a first GaN layer of n-type conductivity, having a top surface characterized by a dislocation defect density of not more than about 5×

10⁶/cm²;

(b) a second GaN layer having a dopant concentration of not more than about 1×

10¹⁵/cm³ and a thickness of more than about 10 μ

m, formed over said first GaN layer;

(c) a third GaN layer of p-type conductivity, formed over said second GaN layer; and

(d) at least one metal contact overlying said third GaN layer.

25. The microelectronic device structure of claim 24, wherein said first GaN layer comprises a free-standing GaN structure.

26. The microelectronic device structure of claim 24, wherein said free-standing GaN structure is formed by steps comprising:

(1) growing a GaN structure of n-type conductivity on a foreign substrate; and

(2) removing said GaN structure of n-type conductivity from the foreign substrate, to form said free-standing GaN structure.

27. The microelectronic device structure of claim 26, wherein said GaN structure of n-type conductivity is grown on the foreign substrate by hydride vapor phase epitaxy, wherein said GaN structure of n-type conductivity is removed from the foreign substrate by separation technique before formation of the second GaN layer thereon, and wherein the second GaN layer is formed on the free-standing GaN structure by hydride vapor phase epitaxy or metal-organic vapor-phase epitaxy.

28. The microelectronic device structure of claim 26, wherein said GaN structure of n-type conductivity is grown on the foreign substrate by hydride vapor phase epitaxy, wherein said GaN structure of n-type conductivity is removed from the foreign substrate by separation after formation of the second GaN layer thereon, and wherein the second GaN layer is formed on the free-standing GaN structure by hydride vapor phase epitaxy.

29. The microelectronic device structure of claim 25, wherein said first GaN layer of n-type conductivity is more than about 50 μ

m in thickness, and wherein said third GaN layer of p-type conductivity is more than about 0.25 μ

m in thickness.

30. The microelectronic device structure of claim 24, wherein a first metal contact forms a first ohmic contact with said first GaN layer of n-type conductivity, and wherein a second metal contact forms a second ohmic contact with said third GaN layer of p-type conductivity.

31. The microelectronic device structure of claim 24, wherein further comprising a sapphire substrate, wherein said first GaN layer of n-type conductivity is formed on said sapphire substrate by hydride vapor phase epitaxy (HVPE), and wherein said sapphire substrate and said first GaN layer of n-type conductivity forms a HVPE/sapphire base structure.

32. The microelectronic device structure of claim 24, wherein the second GaN layer is doped with germanium.

33. The microelectronic device structure of claim 24, wherein the top surface of said first GaN layer of n-type conductivity is undoped, and wherein the second GaN layer is subsequently grown thereupon uniformly, by eliminating dopant o conductivity at the interface of the second GaN layer and the undoped top surface of the first GaN layer of n-type conductivity.

34. A microelectronic device structure, comprising:

(a) a foreign substrate;

(b) a nucleation buffer layer overlying said foreign substrate;

(c) a first GaN layer overlying said nucleation buffer layer, said first GaN layer having a dopant concentration of not more than about 1×

10¹⁶/cm³;

(d) a second GaN layer of n-type conductivity, overlying said first GaN layer;

(e) a third GaN layer overlying said second GaN layer of n-type conductivity, said third GaN layer having a dopant concentration of not more than about 1×

10¹⁶/cm³ and a thickness of at least about 2.5 μ

m;

(f) a fourth GaN layer of p-type conductivity, formed over said third GaN layer; and

(g) at least one metal contact overlying said fourth GaN layer.

35. The microelectronic device structure of claim 34, wherein said foreign substrate comprises a material selected from the group consisting of sapphire, Si, and SiC.

36. The microelectronic device structure of claim 34, wherein said foreign substrate comprises sapphire.

37. The microelectronic device structure of claim 34, wherein the third GaN layer is less than 10 μ

m in thickness.

38. The microelectronic device structure of claim 34, wherein the third GaN layer is less than 20 μ

m in thickness.

39. The microelectronic device structure of claim 34, wherein the third GaN layer is less than 50 μ

m in thickness.

40. The microelectronic device structure of claim 34, wherein the second GaN layer of n-type conductivity is doped with a strain-reducing dopant.

41. The microelectronic device structure of claim 34, wherein the second GaN layer of n-type conductivity is doped with germanium.

42. The microelectronic device structure of claim 34, wherein the first GaN layer has a thickness of about 0.6 μ

m, and wherein the second GaN layer of n-type conductivity has a thickness of about 2.0 μ

m and a dopant concentration of about 1.5×

10¹⁹/cm³.

43. The microelectronic device structure of claim 34, wherein the first GaN layer has a thickness of about 0.6 μ

m, and wherein the second GaN layer of n-type conductivity has a thickness of about 0.5 μ

m and a dopant concentration of about 1.5×

10¹⁹/cm³.

44. The microelectronic device structure of claim 34, wherein said second GaN layer of n-type conductivity comprises a first conductive GaN sub-layer of a first dopant concentration and a second conductive GaN sub-layer of a second dopant concentration, wherein said first conductive GaN sub-layer is adjacent to the first GaN layer, wherein said second conductive GaN sub-layer is adjacent to said third GaN layer, and wherein said first dopant concentration is lower than said second dopant concentration.

45. The microelectronic device structure of claim 44, wherein said first GaN layer has a thickness of about 0.6 μ

m, wherein said first conductive GaN sub-layer has a thickness of about 1.9 μ

m and a dopant concentration of about 2.0×

10¹⁸/cm³, and wherein said second conductive GaN sub-layer has a thickness of about 0.1 μ

m and a dopant concentration of about 1.5×

10¹⁹/cm³.