Semiconductor imaging sensor array devices with dual-port digital readout

• US 20050174452A1
• Filed: 02/07/2005
• Published: 08/11/2005
• Est. Priority Date: 11/24/1998
• Status: Active Grant

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Inventors: Krymski, Alexander, Andersson, Anders, Blerkom, Daniel Van, Bock, Nikolai, Mansoorian, Barmak, Kotlyar, Abraham
• Granted Patent: US 7,667,752 B2
• Time in Patent Office: Days
• US Class Current: 348/294
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array

Abstract

Imaging sensors having dual-port for digital readout to pipeline readout processes of two different groups of pixels.

Claims

1-31. -31. (canceled)

32. A semiconductor imaging device, comprising:

a sensing array having a plurality of sensing pixels;

at least one analog-to-digital converter coupled to said sensing array and configured to convert said analog pixel signals received from said sensing array into respective digital pixel signals, each of said digital pixel signals having a plurality of bits; and

a first storage location and a second storage location, each location coupled alternatively to said analog-to-digital converter and operable to store digital pixel signals from said analog-to-digital converter, said first and second storage location being coupled to read a first digital pixel signal generated from a first sensing pixel into one of said first and second storage locations while the other of said first and second storage locations outputs a second digital pixel signal that is generated from a second different sensing pixel which was converted by said analog-to-digital converter before conversion of said first digital pixel signal.

33. A device as in claim 32, wherein said sensing array is an active pixel array.

34. A device as in claim 32, wherein at least one of said first and second storage locations is a static random access storage location.

35. A device as in claim 32, wherein at least one of said first and second storage locations is a dynamic random access storage location.

36. A device as in claim 32, wherein said analog-to-digital converter is a type that converts all bits of an analog pixel signal at the same time.

37. A device as in claim 32, wherein said analog-to-digital converter is a type that converts one or a portion of all bits of an analog pixel signal sequentially.

38. A device as in claim 32, wherein one of said first and second storage locations is integrated with said analog-to-digital converter to form a circuit block that is separated from said other of said first and second storage locations.

39. A method of using a semiconductor imaging device to detect an image of radiation, comprising:

using a sensing array having a plurality of sensing pixels to receive the image of radiation, each pixel configured to have a radiation sensor and to produce an analog pixel signal in response to radiation;

converting an analog pixel signal from said sensing array into a first digital pixel signal of a plurality of bits by using at least one analog-to-digital converter; and

using as second storage location coupled to said analog-to-digital converter to output a second digital pixel signal that is generated from a second different sensing pixel and is converted by said analog-to-digital converter before conversion of said first digital pixel signal,

wherein said first and second storage locations are alternately coupled to said sensing array.

40. A method as in claim 39, further comprising;

determining which of first and second memory cells both selectively coupled to said at least one analog-to-digital converter is to receive said first digital pixel signal from said at least one analog-to-digital converter.

41. A method as in claim 40, further comprising the step of reading said first digital pixel signal generated from a first sensing pixel into said first storage location coupled to said analog-to-digital converter;

and

42. A method as in claim 39, wherein said analog-to-digital converter is a type that converts all bits of an analog pixel signal at the same time.

43. A method as in claim 39, wherein said analog-to-digital converter is a type that converts one or a portion of all bits of an analog pixel signal sequentially.

44. A semiconductor imaging device, comprising:

a substrate formed of a semiconductor;

a sensing array formed on said substrate and having a plurality of sensing pixels;

a plurality of analog-to-digital converters formed on said substrate, each analog-to-digital converter adapted to be coupled to a specified group of sensing pixels to perform analog-to-digital conversion; and

a first memory array of memory cells formed on said substrate; and

a second memory array of memory cells formed on said substrate, each memory cell of said first and second memory array adapted to being respectively alternatively coupled to one of said plurality of analog-to-digital converters to receive digital pixel signals from said respective ones of said plurality of analog-to-digital converters.

45. A device as in claim 44, wherein each analog-to-digital converter is a type that converts all bits of an analog pixel signal at the same time.

46. A device as in claim 44, wherein each analog-to-digital converter is a type that converts one or a portion of all bits of an analog pixel signal sequentially.

47. A device as in claim 44, further comprising:

a respective command line coupled to each of said first and second memory cells for selecting which of said first and second memory cells is to receive digital pixel signals from said analog-to-digital converter.

48. An integrated circuit, comprising:

a pixel array;

a readout circuit coupled to said pixel array, comprising;

at least one analog-to-digital converter coupled to said pixel array and configured to convert said analog pixel signals received from said pixel array into respective digital pixel signals, each of said digital pixel signals having a plurality of bits; and

a first storage location and a second storage location, each coupled alternatively to said analog-to-digital converter and operable to store digital pixel signals from said analog-to-digital converter, said first and second storage location being coupled to read a first digital pixel signal generated from a first sensing pixel into one of said first and second storage locations while the other of said first and second storage locations outputs a second digital pixel signal that is generated from a second different sensing pixel which was converted by said analog-to-digital converter before conversion of said first digital pixel signal.

49. A circuit as in claim 48, wherein said sensing array is an active pixel array.

50. A circuit as in claim 48, wherein at least one of said first and second storage locations is a static random access storage location.

51. A circuit as in claim 48, wherein at least one of said first and second storage locations is a dynamic random access storage location.

52. A circuit as in claim 48, wherein said analog-to-digital converter is a type that converts all bits of analog pixel signal at the same time.

53. A circuit as in claim 48, wherein said analog-to-digital converter is a type that converts one or a portion of all bits of an analog pixel signal sequentially.

54. A circuit as in claim 48, wherein one of said first and second storage locations is integrated with said analog-to-digital converter to form a circuit block that is separated from said other of said first and second storage locations.