Driver circuit for display device and display device

• US 20050174865A1
• Filed: 02/09/2005
• Published: 08/11/2005
• Est. Priority Date: 02/10/2004
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Washio, Hajime, Murakami, Yuhichiroh, Gyouten, Seijirou
• Granted Patent: US 8,098,224 B2
• Time in Patent Office: Days
• US Class Current: 365/203
• CPC Class Codes: G09G 2310/0248 Precharge or discharge of column electrodes before or after applying exact column voltages
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

A driver circuit for a display device includes NOR circuits on the input side of switches for controlling precharge of data signal lines and selected pixels connected to the data signal lines. While a video signal is written onto a data signal line, a signal instructing precharge of another data signal line is inputted from a shift register to the NOR circuits. A simultaneous precharge instruction signal is inputted from outside to the NOR circuits. According to this arrangement, precharge is performed in both a period in which a video signal is supplied to a data signal line and a period in which no video signal is supplied to any of the data signal lines. As a result, it is possible to perform precharge even with a precharge power source having relatively low driving capability, and to precharge the signal supply lines of the display device sufficiently.

Claims

1. A driver circuit for a display device including a plurality of signal supply lines, the driver circuit comprising:

a write circuit for writing write signals onto the signal supply lines line by line or by units of lines; and

a precharge circuit for precharging the signal supply lines,

while a write signal is written by the write circuit onto a signal supply line, the precharge circuit precharging another signal supply line, and, while no write signal is written by the write circuit onto any of the signal supply lines, the precharge circuit precharging the signal supply lines simultaneously.

2. The driver circuit as set forth in claim 1, further comprising:

precharge control means for causing the precharge circuit to perform precharge when precharge is instructed by at least one of a first precharge control signal and a second precharge control signal,

while a write signal is written by the write circuit onto a signal supply line, the first precharge control signal instructing precharge of another signal supply line,

the second precharge control signal instructing simultaneous precharge of the signal supply lines.

3. The diver circuit as set forth in claim 2, further comprising:

a shift register including plural stages of flip-flops for outputting a write timing pulse to first switches, the flip-flops sequentially transmitting the timing pulse so that writing is performed in a predetermined period,

the write circuit including the first switches respectively for the plurality of signal supply lines, each of the first switches switching between conductive and nonconductive in accordance with a charge voltage of a capacitor-type first control terminal, the write signals being written onto the signal supply lines through conduction of the first switches,

the precharge circuit including second switches respectively for the plurality of signal supply lines, each of the second switches switching between conductive and nonconductive in accordance with a charge voltage of a capacitor-type second control terminal, the signal supply lines being precharged through conduction of the second switches,

the shift register including a control signal supply circuit for outputting the first precharge control signal,

the flip-flops outputting the timing pulse to the first control terminal of each of the first switches,

the precharge control means outputting a control signal for controlling the second switches to the second control terminal of each of the second switches,

the control signal supply circuit outputting the first precharge control signal to the precharge control means through a second signal line, which is separated from a first signal line for transmitting the timing pulse to the first control terminal.

4. The driver circuit as set forth in claim 3, wherein:

the control signal supply circuit takes in a clock signal when the timing pulse is inputted from one of the flip-flops in a writing effective period, and outputs the first precharge control signal to a second control terminal corresponding to a predetermined one of the signal supply lines, so as to make a corresponding second switch conductive, the clock signal being inputted from a supply source that is different from a supply source of the timing pulse, the writing effective period being a period, within the predetermined period, in which the write signals are written onto the signal supply lines, the first precharge control signal being in synchronization with the clock signal, the predetermined one of the signal supply lines being a signal supply line that is not supplied with a write signal; and

the control signal supply circuit being a plurality of control signal supply circuits provided so as to correspond to the signal supply lines that are precharged in the writing effective period.

5. The driver circuit as set forth in claim 4, wherein:

the flip-flops are set-reset flip-flops;

each of the control signal supply circuits is a switching circuit for outputting the clock signal as the first precharge control signal;

the switching circuit also outputs the clock signal as a set signal to be transferred to a next set-reset flip-flop of the set-reset flip-flop that outputted the timing pulse; and

each of the set-reset flip-flops uses the set signal as a reset signal for a predetermined preceding set-reset flip-flop.

6. The driver circuit as set forth in claim 4, wherein:

the flip-flops are set-reset flip-flops;

each of the control signal supply circuits is a level shift circuit that performs level shift of the clock signal, and outputs the clock signal as the first precharge control signal;

the level shift circuit also outputs the clock signal as a set signal to be transferred to a next set-reset flip-flop of the set-reset flip-flop that outputted the timing pulse; and

each of the set-reset flip-flops uses the set signal as a reset signal for a predetermined preceding set-reset flip-flop.

7. The driver circuit as set forth in claim 2, wherein:

the precharge control means is a NOR circuit for outputting a nondisjunction of the first precharge control signal and the second precharge control signal to the precharge circuit.

8. The driver circuit as set forth in claim 2, wherein:

the precharge control means is a selector circuit for outputting the first precharge control signal or the second precharge control signal to the precharge circuit; and

the selector circuit selects the first precharge control signal while a write signal is written by the write circuit onto a signal supply line, and selects the second precharge control signal while no write signal is written by the write circuit onto any of the signal supply lines.

9. The driver circuit as set forth in claim 6, wherein:

the first switches are sequentially made conductive by the timing pulse from the set-reset flip-flops, and the number of the level shift circuit corresponds to the number of the signal supply lines, so as to sequentially make the second switches conductive.

10. The driver circuit as set forth in claim 6, wherein:

i-number of the signal supply lines are used as one unit, where i is an integer not less than two, and the first switches are made conductive simultaneously within said one unit and sequentially unit by unit;

the number of the level shift circuit corresponds to the number of units; and

the second switches are made conductive simultaneously within said one unit and sequentially unit by unit.

11. A display device, comprising:

a plurality of pixels;

a plurality of data signal lines and a plurality of scanning signal lines corresponding to the plurality of pixels;

a data signal line driver for writing video signals onto the data signal lines and the pixels; and

a scanning signal line driver for writing scanning signals onto the scanning signal lines so as to select pixels onto which the video signals are to be written,

the data signal line driver including

a write circuit for writing the video signals onto the data signal lines line by line or by units of lines; and

a precharge circuit for precharging the data signal lines,

while a video signal is written by the write circuit onto a data signal line, the precharge circuit precharging another data signal line, and, while no video signal is written by the write circuit onto any of the data signal lines, the precharge circuit precharging the data signal lines simultaneously.

12. The display device as set forth in claim 11, further comprising:

precharge control means for causing the precharge circuit to perform precharge when precharge is instructed by at least one of a first precharge control signal and a second precharge control signal,

while a video signal is written by the write circuit onto a data signal line, the first precharge control signal instructing precharge of another data signal line,

the second precharge control signal instructing simultaneous precharge of the data signal lines.

13. The display device as set forth in claim 12, further comprising:

a shift register including plural stages of flip-flops for outputting a write timing pulse to first switches, the flip-flops sequentially transmitting the timing pulse so that writing is performed in a predetermined period,

the write circuit including the first switches respectively for the plurality of data signal lines, each of the first switches switching between conductive and nonconductive in accordance with a charge voltage of a capacitor-type first control terminal, the video signals being written onto the data signal lines through conduction of the first switches,

the precharge circuit including second switches respectively for the plurality of data signal lines, each of the second switches switching between conductive and nonconductive in accordance with a charge voltage of a capacitor-type second control terminal, the data signal lines being precharged through conduction of the second switches,

the shift register including a control signal supply circuit for outputting the first precharge control signal,

the flip-flops outputting the timing pulse to the first control terminal of each of the first switches,

the precharge control means outputting a control signal for controlling the second switches to the second control terminal of each of the second switches,

the control signal supply circuit outputting the first precharge control signal to the precharge control means through a second signal line, which is separated from a first signal line for transmitting the timing pulse to the first control terminal.

14. The display device as set forth in claim 13, wherein:

the control signal supply circuit takes in a clock signal when the timing pulse is inputted from one of the flip-flops in a writing effective period, and outputs the first precharge control signal to a second control terminal corresponding to a predetermined one of the data signal lines, so as to make a corresponding second switch conductive, the clock signal being inputted from a supply source that is different from a supply source of the timing pulse, the writing effective period being a period, within the predetermined period, in which the write signals are written onto the data signal lines, the first precharge control signal being in synchronization with the clock signal, the predetermined one of the data signal lines being a data signal line that is not supplied with a write signal; and

the control signal supply circuit is a plurality of control signal supply circuits provided so as to correspond to the data signal lines that are precharged in the writing effective period.

15. The display device as set forth in claim 14, wherein:

the flip-flops are set-reset flip-flops;

each of the control signal supply circuits is a switching circuit for outputting the clock signal as the first precharge control signal;

the switching circuit also outputs the clock signal as a set signal to be transferred to a next set-reset flip-flop of the set-reset flip-flop that outputted the timing pulse; and

each of the set-reset flip-flops uses the set signal as a reset signal for a predetermined preceding set-reset flip-flop.

16. The display device as set forth in claim 14, wherein:

the flip-flops are set-reset flip-flops;

each of the control signal supply circuits is a level shift circuit that performs level shift of the clock signal, and outputs the clock signal as the first precharge control signal;

the level shift circuit also outputs the clock signal as a set signal to be transferred to a next set-reset flip-flop of the set-reset flip-flop that outputted the timing pulse; and

each of the set-reset flip-flops uses the set signal as a reset signal for a predetermined preceding set-reset flip-flop.

17. The display device as set forth in claim 12, wherein:

the precharge control means is a NOR circuit for outputting a nondisjunction of the first precharge control signal and the second precharge control signal to the precharge circuit.

18. The display device as set forth in claim 12, wherein:

the precharge control means is a selector circuit for outputting the first precharge control signal or the second precharge control signal to the precharge circuit; and

the selector circuit selects the first precharge control signal while a video signal is written by the write circuit onto a data signal line, and selects the second precharge control signal while no video signal is written by the write circuit onto any of the data signal lines.

19. The display device as set forth in claim 16, wherein:

the first switches are sequentially made conductive by the timing pulse from the set-reset flip-flops, and the number of the level shift circuit corresponds to the number of the signal supply lines, so as to sequentially make the second switches conductive.

20. The display device as set forth in claim 16, wherein:

i-number of the data signal lines are used as one unit, where i is an integer not less than two, and the first switches are made conductive simultaneously within said one unit and sequentially unit by unit;

the number of the level shift circuit corresponds to the number of units; and

the second switches are made conductive simultaneously within said one unit and sequentially unit by unit.