Accumulating operator and accumulating method for floating point operation

• US 20050177610A1
• Filed: 01/10/2005
• Published: 08/11/2005
• Est. Priority Date: 02/11/2004
• Status: Active Grant

• Current Assignee: VIA Technologies Incorporated (VIA Technologies)
• Original Assignee: VIA Technologies Incorporated (VIA Technologies)
• Inventors: Wang, Ko-Fang
• Granted Patent: US 8,423,600 B2
• Time in Patent Office: Days
• US Class Current: 708/505
• CPC Class Codes: G06F 7/483 Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers G06F7/4806, G06F7/4824, G06F7/49, G06F7/491, G06F7/544 take precedence
• CPC Class Codes: G06F 7/5443 Sum of products for applications thereof, see the relevant places, e.g. G06F17/10, H03H17/00

Abstract

An accumulating operator is applicable to a digital data processor to realize an output floating point number in response to a first floating point number and a second floating point number. The accumulating operator comprises a splitter dividing the first floating point number into a third floating point number and a compensation number, wherein an exponent of the third floating point number is equal to or greater than the exponent of the second floating point number; an accumulator electrically connected to the splitter for operating the second and third floating point numbers to realize a fourth floating point number; and a compensator electrically connected to the splitter and the accumulator for operating the fourth floating point number and the compensation number to realize the output floating point number. Via compensation, the precision of the floating point operation can be improved.

Claims

1. An accumulating operator for use in a digital data processor to realize an output floating point number in response to a first floating point number and a second floating point number, said accumulating operator comprises:

a splitter dividing said first floating point number into a third floating point number and a compensation number, wherein an exponent of said third floating point number is equal to the exponent of said second floating point number;

an accumulator electrically connected to said splitter for operating said second and third floating point numbers to realize a fourth floating point number; and

a compensator electrically connected to said splitter and said accumulator for operating said fourth floating point number and said compensation number to realize said output floating point number.

2. The accumulating operator according to claim 1 wherein a sum of said third floating point number and said compensation number is equal to said first floating point number, said second and third floating point numbers execute an addition operation in said accumulator, and said fourth floating point number and said compensation number execute an addition operation in said compensator.

3. The accumulating operator according to claim 1 wherein said fourth floating point number is fed back to said accumulator to replace said third floating point number to be operated with said second floating point number.

4. The accumulating operator according to claim 3 further comprising a multiplexer electrically connected to said splitter and said accumulator and controlled to select said third or fourth floating point number to be outputted to said accumulator.

5. The accumulating operator according to claim 4 further comprising a register electrically connected to said multiplexer and said accumulator for storing therein one of said third and fourth floating point numbers selected via said multiplexer.

6. The accumulating operator according to claim 5 wherein said accumulator comprises:

a multiplier for realizing said second floating point number in response to an input floating point number and an input integer; and

an adder coupled to said register and said multiplexer for executing an addition operation of said floating point numbers stored in said register and said second floating point number.

7. The accumulating operator according to claim 6 wherein said digital data processor is a graphics processor and said accumulator includes at least one multipliers and at least one adders.

8. The accumulating operator according to claim 1 wherein said compensator is a floating point adder.

9. An accumulating operator for use in a digital data processor to realize an output floating point number in response to a first floating point number and a second floating point number, said accumulating operator comprises:

a splitter dividing said first floating point number into a third floating point number and a compensation number, wherein an exponent of said third floating point number is equal to or greater than the exponent of said second floating point number;

an accumulator electrically connected to said splitter for operating said second and third floating point numbers to realize a fourth floating point number; and

a compensator electrically connected to said splitter and said accumulator for operating said fourth floating point number and said compensation number to realize said output floating point number.

10. The accumulating operator according to claim 9 wherein a sum of said third floating point number and said compensation number is equal to said first floating point number, said second and third floating point numbers execute an addition operation in said accumulator, and said fourth floating point number and said compensation number execute an addition operation in said compensator.

11. The accumulating operator according to claim 9 further comprising a multiplexer electrically connected to said splitter and said accumulator for receiving said third and fourth floating point numbers, and controlled to select said third or fourth floating point number to be outputted to said accumulator to be operated with said second floating point number.

12. An accumulating method for realizing an output floating point number in response to a first floating point number and a second floating point number, said method comprising steps of:

splitting said first floating point number into a third floating point number and a compensation number, wherein an exponent of said third floating point number is equal to or greater than the exponent of said second floating point number, and a sum of said third floating point number and said compensation number is equal to said first floating point number;

performing an addition operation of said second and third floating point numbers to realize a fourth floating point number in a first operating cycle; and

performing an addition operation of said fourth floating point number and said compensation number to realize said output floating point number.

13. The accumulating method according to claim 12 further comprising a step of replacing said fourth floating point number for said third floating point number to perform an addition operation with said second floating point number in a second operating cycle subsequent to said first operating cycle.

14. The accumulating method according to claim 12 further comprising a step of selecting one of said third and fourth floating point numbers to perform an addition operation with said second floating point number in a second operating cycle subsequent to said first operating cycle.

15. The accumulating method according to claim 14 being used in a graphics processor to operate a plane equation and further comprising a step of performing a plurality of multiplication operations of input floating point numbers with corresponding input integers to realize a plurality of floating point numbers including said second floating point number.