Drive circuit for el display panel

• US 20050180083A1
• Filed: 03/05/2003
• Published: 08/18/2005
• Est. Priority Date: 04/26/2002
• Status: Abandoned Application

• Current Assignee: Toshiba Matsushita Display Technology Co Ltd (Japan Display Incorporated)
• Original Assignee: Toshiba Matsushita Display Technology Co Ltd (Japan Display Incorporated)
• Inventors: Takahara, Hiroshi, Tsuge, Hitoshi
• Application Number:
  US10/511,448
• Publication Number:
  US 20050180083A1
• Time in Patent Office: Days
• US Class Current: 361/152
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2300/0417 Special arrangements specific to the use of low carrier mobility technology
• CPC Class Codes: G09G 2300/0452 Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2300/0866 by means of changes in the pixel supply voltage
• CPC Class Codes: G09G 2310/02 Addressing, scanning or driving the display screen or processing steps related thereto
• CPC Class Codes: G09G 2310/0218 with collection of electrodes in groups for n-dimensional addressing
• CPC Class Codes: G09G 2310/0251 Precharge or discharge of pixel before applying new pixel voltage
• CPC Class Codes: G09G 2310/0256 with the purpose of reversing the voltage across a light emitting or modulating element within a pixel
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2310/0283 Arrangement of drivers for different directions of scanning
• CPC Class Codes: G09G 2310/0297 Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
• CPC Class Codes: G09G 2310/06 Details of flat display driving waveforms
• CPC Class Codes: G09G 2310/061 for resetting or blanking
• CPC Class Codes: G09G 2320/0214 with crosstalk due to leakage current of pixel switch in active matrix panels
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/0261 : in the context of movement of objects on the screen or movement of the observer relative to the screen
• CPC Class Codes: G09G 2320/043 : Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2320/0606 : Manual adjustment
• CPC Class Codes: G09G 2320/0626 : for control of overall brightness
• CPC Class Codes: G09G 2320/066 : for control of contrast
• CPC Class Codes: G09G 2320/08 : Arrangements within a display terminal for setting, manually or automatically, display parameters of the display terminal
• CPC Class Codes: G09G 2330/02 : Details of power systems and of start or stop of display operation
• CPC Class Codes: G09G 2330/12 : Test circuits or failure detection circuits included in a display system, as permanent part thereof
• CPC Class Codes: G09G 3/006 : Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/20 : for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/2014 : by modulation of the duration of a single pulse during which the logic level remains constant
• CPC Class Codes: G09G 3/22 : using controlled light sources
• CPC Class Codes: G09G 3/3241 : the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
• CPC Class Codes: G09G 3/325 : the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
• CPC Class Codes: G09G 3/3266 : Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3283 : in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
• CPC Class Codes: H10K 50/844 : Encapsulations
• CPC Class Codes: H10K 50/846 : comprising getter material or desiccants
• CPC Class Codes: H10K 50/85 : Arrangements for extracting light from the devices
• CPC Class Codes: H10K 50/86 : Arrangements for improving contrast, e.g. preventing reflection of ambient light
• CPC Class Codes: H10K 50/87 : Arrangements for heating or cooling
• CPC Class Codes: H10K 59/12 : Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/131 : Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 59/351 : comprising more than three subpixels, e.g. red-green-blue-white [RGBW]
• CPC Class Codes: H10K 59/353 : characterised by the geometrical arrangement of the RGB subpixels
• CPC Class Codes: H10K 59/873 : Encapsulations
• CPC Class Codes: H10K 59/874 : including getter material or desiccant
• CPC Class Codes: H10K 59/875 : Arrangements for extracting light from the devices
• CPC Class Codes: H10K 59/8791 : Arrangements for improving contrast, e.g. preventing reflection of ambient light
• CPC Class Codes: H10K 59/8794 : Arrangements for heating and cooling
• CPC Class Codes: H10K 59/88 : Dummy elements, i.e. elements having non-functional features
• CPC Class Codes: H10K 71/861 : Repairing

Abstract

To provide a source driver circuit for an EL display panel with reduced variations in output current.

A source driver circuit contains unit transistors 634 each of which constitutes a single unit. The 0th bit consists of one unit transistor 634, the 1st bit consists of two unit transistors 634, the 2nd bit consists of four unit transistors 634, the 3rd bit consists of eight unit transistors 634, the 4th bit consists of 16 unit transistors 634, and the 5th bit consists of 32 unit transistors 634.

Each unit transistor 634 composes a current mirror circuit in conjunction with a transistor 633a. Regulating the current Ib flowing through the transistor 633a allows for changing the current flowing through the unit transistors 634. Accurate source driver IC with small variations can be provided by configuring output current circuits with unit transistors and regulating reference currents so that the output current of the unit transistors can be regulated.

Claims

1. A driver circuit for an EL display panel comprising:

reference current generating means of generating a reference current;

a first current source which is fed the reference current from the reference current generating means and outputs a first current which corresponds to the reference current to a plurality of second current sources;

the second current sources which are fed the first current outputted from the first current source and output a second current which corresponds to the first current to a plurality of third current sources; and

the third current sources which are fed the second current outputted from the second current sources and output a third current which corresponds to the second current to a plurality of fourth current sources,

characterize in that among the fourth current sources, an appropriate number of unit current sources are selected according to input image data.

2. A driver circuit for an EL display panel comprising:

a plurality of current generator circuits each of which includes unit transistors equal in number to a power of two;

switch circuits connected to the respective current generator circuits;

internal wiring connected to output terminals; and

a control circuit configured to turn on and off the switch circuits according to input data,

wherein a first end of each switch circuit is connected to the current generator circuit and a second end of each switch circuit is connected to the internal wiring.

3. The driver circuit for an EL display panel according to claim 2, wherein:

channel width W of the unit transistors is from 2 to 9 μ

m both inclusive, and

size (WL) of the transistors is 4 square μ

m or more.

4. The driver circuit for an EL display panel according to claim 2, wherein:

a ratio of channel length L to channel width W of the unit transistors is two or larger; and

power supply voltage used is between 2.5 V and 9 V both inclusive.

5. A driver circuit for an EL display panel comprising:

a first output current circuit including a plurality of unit transistors configured to pass a first unit current;

a second output current circuit including a plurality of unit transistors configured to pass a second unit current; and

an output stage configured to produce an output by adding an output current of the first output current circuit and an output current of the second output current circuit,

wherein the first unit current is smaller than the second unit current,

the first output current circuit operates in a low gradation region and a high gradation region according to gradations, and

the second output current circuit operates in the high gradation region according to gradations, and output current values of the first output current circuit do not change in the high gradation region when the second output current circuit operates.

6. A driver circuit for an EL display panel comprising:

a programming current generator circuit including a plurality of unit transistors corresponding to output terminals;

first transistors configured to generate a first reference current that defines a current flowing through the unit transistors;

gate wiring connected to gate terminals of the plurality of first transistors; and

second and third transistors whose gate terminals are connected to the gate wiring and that form current mirror circuits in conjunction with the first transistors,

wherein a second reference current is supplied to the second and third transistors.

7. The driver circuit for an EL display panel according to claim 6, further comprising:

a programming current generator circuit including a plurality of unit transistors corresponding to output terminals;

a plurality of first transistors configured to form current mirror circuits in conjunction with the unit transistors; and

a second transistor configured to generate a reference current flowing through the first transistors,

wherein the reference current generated by the second transistor branches through the plurality of first transistors.

8. The driver circuit for an EL display panel according to claim 6, wherein in a driver IC chip which includes the driver circuit, the third transistor is electrically connected, in an area in which the first reference current supply wirings are placed, to two outermost placed wirings of the reference current supply wiring group placed in the area.

9. The driver circuit for an EL display panel according to claim 7, wherein in a driver IC chip which includes the driver circuit, the third transistor is electrically connected, in an area in which the first reference current supply wirings are placed, to two outermost placed wirings of the reference current supply wiring group placed in the area.

10. An EL display apparatus comprising:

a first substrate on which driver transistors are placed in a matrix and that contains a display area including EL elements formed corresponding to the driver transistors;

a source driver IC configured to apply a programming current or voltage to the driver transistors;

a first wiring formed on the first substrate located under the source driver IC;

a second wiring electrically connected to the first wiring and formed between the source driver IC and the display area; and

an anode wiring that branches from the second wiring and applies an anode voltage to pixels in the display area.

11. The EL display apparatus according to claim 10, wherein the first wiring has a light shielding function.

12. An EL display apparatus comprising:

a display area in which pixels with EL elements are formed in a matrix;

driver transistors configured to supply light-emitting current to the EL elements; and

a source driver circuit configured to supply programming current to the driver transistors,

wherein the driver transistors are P-channel transistors, and

transistors that generate the programming current in the source driver circuit are N-channel transistors.

13. An EL display apparatus comprising:

a display area in which EL elements, driver transistors configured to supply light-emitting current to the EL elements, first switching elements configured to form paths between the driver transistors and the EL elements, and second switching elements configured to form paths between the driver transistors and source signal lines are formed in a matrix;

a first gate driver circuit configured to perform on/off control of the first switching elements;

a second gate driver circuit configured to perform on/off control of the second switching elements; and

a source driver circuit configured to supply programming current to the driver transistors,

wherein the driver transistors are P-channel transistors, and

transistors that generate the programming current in the source driver circuit are N-channel transistors.

14. An EL display apparatus comprising:

EL elements;

P-channel driver transistors configured to supply light-emitting current to the EL elements;

switching transistors formed between the EL elements and the driver transistors;

a source driver circuit configured to supply programming current; and

gate driver circuits configured to keep the switching transistors off for two horizontal scanning periods or longer in one frame period.