Global network computers

• US 20050180095A1
• Filed: 10/15/2003
• Published: 08/18/2005
• Est. Priority Date: 11/29/1996
• Status: Abandoned Application

• Current Assignee: Frampton E. Ellis
• Original Assignee: Frampton E. Ellis
• Inventors: Ellis, Frampton E.
• Application Number:
  US10/684,657
• Publication Number:
  US 20050180095A1
• Time in Patent Office: Days
• US Class Current: 361/600
• CPC Class Codes: A01N 25/30 characterised by the surfactants
• CPC Class Codes: G06F 11/1666 where the redundant component is memory or memory area
• CPC Class Codes: G06F 11/2035 without idle spare hardware
• CPC Class Codes: G06F 11/2043 where the redundant components share a common memory address space
• CPC Class Codes: G06F 15/76 Architectures of general purpose stored program computers with program plugboard G06F15/08; multicomputers G06F15/16
• CPC Class Codes: G06F 21/00 Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
• CPC Class Codes: G06F 9/5072 Grid computing
• CPC Class Codes: H04L 43/00 Arrangements for monitoring or testing data switching networks
• CPC Class Codes: H04L 63/02 for separating internal from external traffic, e.g. firewalls
• CPC Class Codes: H04L 63/0209 Architectural arrangements, e.g. perimeter networks or demilitarized zones
• CPC Class Codes: H04L 67/10 in which an application is distributed across nodes in the network software deployment G06F8/60; multiprogramming arrangements G06F9/46
• CPC Class Codes: H04L 69/14 Multichannel or multilink protocols
• CPC Class Codes: H04L 69/329 in the application layer [OSI layer 7]
• CPC Class Codes: H04L 9/40 Network security protocols
• CPC Class Codes: Y04S 40/00 Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them

Abstract

Embodiments useful for a network of computers are presented. In an embodiment, a microchip includes a plurality of dies. Each die is made by a separate fabrication process and assembled into a package with the separate die sections connected directly.

Claims

1. A microchip comprising:

a plurality of dies, each made by a separate fabrication process and assembled into a package with the separate die sections connected directly.

2. The microchip according to claim 1, wherein the separate die sections are connected by interconnects that are widened compared to the circuits of the die.