Novel multi-state memory
2 Assignments
0 Petitions
Accused Products
Abstract
Maximized multi-state compaction and more tolerance in memory state behavior is achieved through a flexible, self-consistent and self-adapting mode of detection, covering a wide dynamic range. For high density multi-state encoding, this approach borders on full analog treatment, dictating analog techniques including A to D type conversion to reconstruct and process the data. In accordance with the teachings of this invention, the memory array is read with high fidelity, not to provide actual final digital data, but rather to provide raw data accurately reflecting the analog storage state, which information is sent to a memory controller for analysis and detection of the actual final digital data.
-
Citations
74 Claims
-
1-41. -41. (canceled)
-
42. A storage device comprising:
-
a semiconductor memory for storing data, the memory including a plurality of units of data access;
means for reading the data from each unit of data access of the memory;
error detection and correction means for detecting and correcting an error of the read data for each unit of data access; and
means for rewriting data in an area in which error correction is carried out, back in the same read area when an error is detected in the read data. - View Dependent Claims (43)
-
-
44. A storage device comprising:
-
a semiconductor memory for storing data, the memory including a plurality of units of data access;
means for reading the data from each unit of data access of the memory;
error detection and correction means for detecting and correcting an error of the read data for each unit of data access;
means for recording an error count about the read data for each unit of data access; and
means for carrying out a comparison of a value of the error count with a predetermined value when an error is detected in the read data, and for rewriting data in an area in which error correction of the data is carried out in the same area on the basis of a result of the comparison. - View Dependent Claims (45)
-
-
46. A storage device comprising:
-
a semiconductor memory for storing data, the memory including a plurality of units of data access;
means for reading the data from each unit of data access of the memory;
error detection and correction means for detecting and correcting an error of the read data for each unit of data access;
means for recording an error count about the read data for each unit of data access; and
means for carrying out a comparison of a value of the error count with a predetermined value when an error is detected in the read data, and for rewriting data in an area in which error correction is carried out, in one of the same area and another area on the basis of a result of the comparison. - View Dependent Claims (47)
-
-
48. A storage device comprising:
-
a semiconductor memory for storing data, the memory including a plurality of units of data access;
read circuitry connectable to the memory, whereby for each of said units of data access the data quality is determined simultaneously with the data content; and
error correction circuitry connectable to the memory, whereby an error of the read data content can be corrected on the basis of said data quality, comprising programming circuitry connectable to the memory for writing data in an area in which a read process is carried out in a location on the basis of said data quality. - View Dependent Claims (49, 50, 51, 52, 53, 54, 55)
-
-
56-71. -71. (canceled)
-
72. A storage apparatus to be coupled with a system bus for receiving a write request accompanied with a data through said system bus from a host system comprising:
-
a nonvolatile flash semiconductor memory which includes a plurality of memory blocks and a management area, and a controller unit which is coupled with said system bus and said nonvolatile flash semiconductor memory and which carries out error detection and correction operations with respect to read data from, one block of said plurality of memory blocks of said nonvolatile flash semiconductor memory, wherein said controller unit carries out a recording operation of a count of said error detection and correction operations into said management area within said nonvolatile flash semiconductor memory. - View Dependent Claims (73, 74)
-
Specification