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Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates

  • US 20050180686A1
  • Filed: 04/07/2005
  • Published: 08/18/2005
  • Est. Priority Date: 12/07/2000
  • Status: Active Grant
First Claim
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30. A wafer assembly comprising:

  • a lower semiconductor wafer comprising a plurality of mirror device areas, each mirror device area comprising a mirror array having mirrors disposed in a rectangular array area;

    wherein the mirrors have mirror edges that are neither parallel nor perpendicular to edges of the rectangular array area;

    an upper light transmissive wafer bonded in spaced apart relationship to the lower wafer; and

    one or more intermediate wafers bonded between the upper and lower wafer and having open areas corresponding to each mirror device location.

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