Method and system for identifying and locating defects in an integrated circuit
First Claim
1. A method for testing an integrated circuit having a power grid and a plurality of ordered connections to the power grid, comprising:
- applying a time-varying input signal to the integrated circuit;
measuring power signals produced at a plurality of respective ordered connections in response to the input signal;
identifying from the power signals so measured one or more defects in the integrated circuit.
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Abstract
A method and system for detecting and locating defects in an integrated circuit. A time-varying input signal is applied to the integrated circuit, power signals produced at a plurality of respective ordered connections in response to the input signal are measured, and one or more defects in the integrated circuit are identified from the power signals so measured. A system is provided having a probe for connecting to the die of an integrated circuit prior to final packaging, a testing system for applying transient input signals to the die and acquiring die power signal measurements in response thereto, and a data processor for determining whether the power signal measurements indicate the presence of a defect in the die. Also provided is a method for reducing the effect of contact resistance from test probe connections. As a way of implementing the approach of the method and system there is also provided an integrated circuit having a plurality of ordered connections to the power grid and a plurality of calibration circuits associated with respective ordered connections so as to selectively inject transient signals onto the power grid at respective locations.
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Citations
40 Claims
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1. A method for testing an integrated circuit having a power grid and a plurality of ordered connections to the power grid, comprising:
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applying a time-varying input signal to the integrated circuit;
measuring power signals produced at a plurality of respective ordered connections in response to the input signal;
identifying from the power signals so measured one or more defects in the integrated circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34)
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35. In a method for testing an integrated circuit having a power grid and a plurality of ordered connections to the power grid, comprising applying an input signal to the integrated circuit, measuring power signals produced at a plurality of respective ordered connections in response to the input signal, and identifying from the power signals so measured one or more defects in the integrated circuit, a method for reducing the effect of contact resistance from test probe connections, comprising:
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determining a first two-dimensional array of reference calibration power signal values for a reference device, one dimension of the array corresponding to the ordered connection at which a calibration power signal value is measured and the other dimension of the array corresponding to the ordered connection at whose location a calibration signal is injected into the integrated circuit;
determining a second two-dimensional array of test device power signal values for the integrated circuit under test, one dimension of the array corresponding to the ordered connection at which a calibration power signal value is measured and the other dimension of the array corresponding to the ordered connection at whose location a calibration signal is injected into the integrated circuit;
inverting the second array and multiplying it times the second array to produce a third, transformation array; and
multiplying the measured test power signal values times the corresponding portions of the transformation array to prior to identifying defects.
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36. A system for testing an integrated circuit having a power grid and a plurality of ordered connections to the power grid, comprising:
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a probe for connecting to the die of an integrated circuit prior to final packaging, the probe including a power supply for the die;
a data acquisition device, coupled to the probe, for applying transient input signals to the die and acquiring die power signal measurements in response thereto; and
a data processor, coupled to the data acquisition device, for determining whether the power signal measurements indicate the presence of a defect in the die. - View Dependent Claims (37, 38, 39)
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40. An integrated circuit, comprising:
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a plurality of signal processing circuit components disposed on a substrate;
a power grid for supplying power to the signal processing circuit components, and having a plurality of ordered connections to the power grid; and
a plurality of calibration circuits associated with respective ordered connections so as to selectively inject transient signals onto the power grid at respective locations.
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Specification