Boosting circuit and semiconductor device using the same
First Claim
1. A boosting circuit comprising:
- a first charge pump circuit which contains a first capacitive section charged to a first voltage;
a second charge pump circuit which contains a second capacitive section charged to said first voltage;
a third charge pump circuit which contains a third capacitive section charged to said first voltage; and
a switching unit which connects said first charge pump circuit and said second charge pump circuit in series in response to a first switch signal and a control signal such that a second voltage higher than said first voltage is outputted from a first node to a first internal circuit of a semiconductor device, and connects said first charge pump circuit, said second charge pump circuit and said third charge pump circuit in series in response to a second switch signal and said control signal, such that a third voltage is outputted from a second node to a second internal circuit of said semiconductor device.
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Accused Products
Abstract
A boosting circuit includes first to third charge pump circuits and a switching unit. The first to third charge pump circuit which contains first to third capacitive section charged to the first voltage, respectively. The switching unit connects the first charge pump circuit and the second charge pump circuit in series in response to a first switch signal and a control signal such that a second voltage higher than the first voltage is outputted from a first node to a first internal circuit of a semiconductor device. Also, the switching unit connects the first charge pump circuit, the second charge pump circuit and the third charge pump circuit in series in response to a second switch signal and the control signal, such that a third voltage is outputted from a second node to a second internal circuit of the semiconductor device.
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Citations
20 Claims
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1. A boosting circuit comprising:
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a first charge pump circuit which contains a first capacitive section charged to a first voltage;
a second charge pump circuit which contains a second capacitive section charged to said first voltage;
a third charge pump circuit which contains a third capacitive section charged to said first voltage; and
a switching unit which connects said first charge pump circuit and said second charge pump circuit in series in response to a first switch signal and a control signal such that a second voltage higher than said first voltage is outputted from a first node to a first internal circuit of a semiconductor device, and connects said first charge pump circuit, said second charge pump circuit and said third charge pump circuit in series in response to a second switch signal and said control signal, such that a third voltage is outputted from a second node to a second internal circuit of said semiconductor device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A boosting circuit comprising:
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N (N is an integer of two or more) charge pump circuits to which a power supply voltage is applied; and
a switching unit which connects the J (J is an integer satisfying 2≦
J≦
N) charge pump circuits among said N charge pump circuits in series in response to a control signal and a first switching signal, to output a voltage equal to (J+1) times said power supply voltage to a first internal circuit of a semiconductor device, and which connects the k (k is an integer satisfying 2≦
K≦
N) charge pump circuits among said N charge pump circuits in series in response to said control signal and a second switching signal, to output a voltage equal to (K+1) times said power supply voltage to a second internal circuit of said semiconductor device.
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14. A semiconductor device comprising:
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a boosting circuit; and
first and second internal circuits connected to said boosting circuit via first and second nodes, wherein said boosting circuit comprises;
a first charge pump circuit which contains a first capacitive section charged to a first voltage;
a second charge pump circuit which contains a first capacitive section charged to said first voltage;
a third charge pump circuit which contains a first capacitive section charged to said first voltage; and
a switching unit which connects said first charge pump circuit and said second charge pump circuit in series in response to a first switch signal and a control signal such that a second voltage higher than said first voltage is outputted from said first node to said first internal circuit, and connects said first charge pump circuit, said second charge pump circuit and said third charge pump circuit in series in response to a second switch signal and said control signal, such that a third voltage is outputted from said second node to said second internal circuit. - View Dependent Claims (15, 16, 17)
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18. A semiconductor device comprising:
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a boosting circuit; and
first and second internal circuits connected to said boosting circuit via first and second nodes, wherein said boosting circuit comprises;
N (N is an integer of two or more) charge pump circuits to which a power supply voltage is applied; and
a switching unit which connects the J (J is an integer satisfying 2≦
J≦
N) charge pump circuits among said N charge pump circuits in series in response to a control signal and a first switching signal, to output a voltage equal to (J+1) times said power supply voltage to a first internal circuit of a semiconductor device, and which connects the k (k is an integer satisfying 2≦
K≦
N) charge pump circuits among said N charge pump circuits in series in response to said control signal and a second switching signal, to output a voltage equal to (K+1) times said power supply voltage to a second internal circuit of said semiconductor device.
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19. A method of boosting a voltage, comprising:
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charging first and second capacitors to a first voltage in first and second modes;
boosting a potential of said first capacitor to twice of said first voltage in said first and second modes;
connecting said first and second capacitors in series in said first mode to output a second voltage;
charging a third capacitors to said first voltage in said second mode; and
connecting said first to third capacitor in series in said second mode to output a third voltage. - View Dependent Claims (20)
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Specification