Adaptive equalizer with DC offset compensation

• US 20050184801A1
• Filed: 02/20/2004
• Published: 08/25/2005
• Est. Priority Date: 02/20/2004
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Hidaka, Yasuo, Gai, Weixin
• Granted Patent: US 7,034,608 B2
• Time in Patent Office: Days
• US Class Current: 330/9
• CPC Class Codes: H03F 2200/78 A comparator being used in a controlling circuit of an amplifier
• CPC Class Codes: H03F 2203/45652 the LC comprising one or more further dif amp stages, either identical to the dif amp or not, in cascade
• CPC Class Codes: H03F 2203/45702 the LC comprising two resistors
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03F 3/45659 Controlling the loading circuit of the differential amplifier
• CPC Class Codes: H03F 3/45744 by offset reduction
• CPC Class Codes: H03F 3/45968 by offset reduction
• CPC Class Codes: H03G 5/165 Equalizers; Volume or gain control in limited frequency bands
• CPC Class Codes: H04L 2025/03445 Time domain

Abstract

A method for correcting DC offsets in a multi-stage amplifier includes determining a DC offset imparted by a multi-stage amplifier to an input signal. The method further includes applying a correction voltage to a plurality of selected stages in the multi-stage amplifier. The total correction voltage applied substantially negates the DC offset imparted by the multi-stage amplifier.

Claims

1. A method for correcting DC offsets in a multi-stage amplifier, comprising:

determining a DC offset imparted by a multi-stage amplifier to an input signal; and

applying a correction voltage to a plurality of selected stages in the multi-stage amplifier, wherein the total correction voltage applied substantially negates the DC offset imparted by the multi-stage amplifier.

2. The method of claim 1, wherein the step of determining a DC offset comprises determining a DC offset for each stage of the amplifier.

3. The method of claim 2, wherein:

the correction voltage is applied to every stage of the amplifier; and

the correction voltage applied to each stage is equal in magnitude to the DC offset imparted by the stage.

4. The method of claim 1, wherein the total correction voltage is divided evenly among the selected stages at which the correction voltage is applied.

5. The method of claim 1, further comprising:

monitoring an output DC offset for an output signal of the multi-stage amplifier;

detecting a change in the output DC offset; and

adjusting the correction voltage applied to the stages in response to the change in the output DC offset.

6. The method of claim 1, further comprising:

adding a new stage to the multi-stage amplifier;

determining a DC offset imparted by the new stage; and

applying a correction voltage equal in magnitude to the DC offset imparted by the new stage.

7. The method of claim 1, further comprising:

adjusting the gain of one of the stages of the amplifier; and

in response to the adjustment of the gain, adjusting the correction voltage applied to the stage for which the gain was adjusted.

8. The method of claim 1, wherein:

the multi-stage amplifier comprises one of a plurality of multi-stage amplifiers, wherein each multi-stage amplifier is operable to amplify a respective signal on a respective communication path;

the respective signals are mixed into a combined output signal; and

the method further comprises;

monitoring for a change in a DC offset of the combined output signal; and

adjusting the correction voltage in response to detecting the change in the DC offset of the combined output signal.

9. The method of claim 1, wherein:

the method is performed in an equalizer operable to compensate for attenuation in an input signal; and

the gain of the multi-stage amplifier is controlled by an adaptive controller of the equalizer.

10. The method of claim 9, wherein the method further comprises:

detecting an indication from the adaptive controller than the gain of the multi-stage amplifier has been changed; and

adjusting the correction voltage in response to the change.

11. The method of claim 1, wherein the input signal has a frequency of at least one gigahertz.

12. A multi-stage amplifier, comprising:

a plurality of stages, each stage operable to apply a respective gain to an input signal; and

an offset controller operable to apply a correction voltage to a plurality of selected stages, wherein the total correction voltage applied to the stages substantially negates a total DC offset imparted by the multi-stage amplifier.

13. The amplifier of claim 12, wherein the offset controller is further operable to apply a correction voltage to each of the stages equal in magnitude to a DC offset imparted by the stage.

14. The amplifier of claim 12, wherein the total correction voltage is divided evenly among the selected stages at which the correction voltage is applied.

15. The amplifier of claim 12, wherein:

the amplifier further comprises an offset monitor operable to;

monitor an output DC offset for an output signal of the multi-stage amplifier; and

detect a change in the output DC offset; and

the offset controller is further operable to adjust the correction voltage applied to the stages in response to the change in the output DC offset.

16. The amplifier of claim 12, wherein the offset controller is further operable to:

detect an adjustment of the gain of one of the stages of the amplifier; and

in response to the adjustment of the gain, adjust the correction voltage applied to the stage for which the gain was adjusted.

17. The amplifier of claim 12, wherein:

the multi-stage amplifier comprises one of a plurality of multi-stage amplifiers, wherein each multi-stage amplifier is operable to amplify a respective signal on a respective communication path;

the respective signals are mixed into a combined output signal; and

the amplifier further comprises an offset monitor operable to monitor for a change in a DC offset of the combined output signal; and

adjusting the correction voltage in response to detecting the change in the DC offset of the combined output signal.

18. The amplifier of claim 12, wherein:

the amplifier is part of an equalizer operable to compensate for attenuation in an input signal; and

the gain of the multi-stage amplifier is controlled by an adaptive controller of the equalizer.

19. The amplifier of claim 12, wherein the input signal has a frequency of at least one gigahertz.

20. A multi-stage amplifier, comprising:

means for determining a DC offset imparted by a multi-stage amplifier; and

means for applying a correction voltage to a plurality of selected stages in the multi-stage amplifier, wherein the total correction voltage applied substantially negates the DC offset imparted by the multi-stage amplifier.

21. The amplifier of claim 20, further comprising:

means for monitoring an output DC offset for an output signal of the multi-stage amplifier;

means for detecting a change in the output DC offset; and

means for adjusting the correction voltage applied to the stages in response to the change in the output DC offset.

22. The amplifier of claim 20, further comprising:

means for adjusting the gain of one of the stages of the amplifier; and

means for adjusting the correction voltage applied to the stage for which the gain was adjusted in response to the adjustment of the gain.