Defect-signal generating circuit and optical disk reproducing device having the same

• US 20050185550A1
• Filed: 02/11/2005
• Published: 08/25/2005
• Est. Priority Date: 02/19/2004
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Yamaguchi, Takeshi, Ando, Ryo
• Granted Patent: US 7,339,867 B2
• Time in Patent Office: Days
• US Class Current: 369/53.150
• CPC Class Codes: G11B 20/10203 baseline correction DC correction by choosing codewords of the modulation code G11B20/1426

Abstract

An optical disk reproducing device has a defect-signal generating circuit including a peak-holding-signal generating circuit for generating a peak-hold signal based on an RF signal read from a recording medium, an intermediate-signal generating circuit for generating an intermediate signal based on the peak-hold signal, a signal-level adjusting circuit for generating a threshold signal based on the intermediate signal, a threshold-signal adjusting circuit for adjusting the level of the threshold signal, and a comparator for generating a defect signal based on the peak-hold signal and threshold signal. The threshold-signal adjusting circuit includes at least one of: a first adjusting circuit for raising the threshold signal in the event the peak-hold signal falls below the threshold signal due to the peak-hold signal and the threshold signal being reversed; and a second adjusting circuit for lowering the threshold signal in the event the peak-hold signal exceeds the threshold signal, due to the reversal.

Claims

1. A defect-signal generating circuit comprising:

a peak-hold signal generating circuit for generating a peak-hold signal by holding the peak of an RF signal read out from a recording medium;

an intermediate-signal generating circuit, which is a peak-holding circuit having a longer time constant than said peak-hold signal generating circuit, for generating an intermediate signal by holding the peak of said RF signal;

a signal-level adjusting circuit for generating a threshold signal by shifting the signal level of said intermediate signal;

a threshold-signal adjusting circuit for adjusting the signal level of said threshold signal; and

a comparator for generating a defect signal by comparing said peak-hold signal with said threshold signal;

wherein said threshold-signal adjusting circuit includes at least one of

a first adjusting circuit for adjusting the signal level of said threshold signal in the event that the signal level of said peak-hold signal falls below that of said threshold signal, due to the signal level of said peak-hold signal and that of said threshold signal being reversed, so as to raise the signal level of said threshold signal higher than that in the case of no adjustment being performed, and

a second adjusting circuit for adjusting the signal level of said threshold signal in the event that the signal level of said peak-hold signal rises above that of said threshold signal, due to the signal level of said peak-hold signal and that of said threshold signal being reversed, so as to lower the signal level of said threshold signal lower than that in the case of no adjustment being performed.

2. The defect-signal generating circuit according to claim 1, wherein said threshold-signal adjusting circuit adjusts the signal level of said threshold signal so as to retain the signal level of said threshold signal at the point of the signal level of said peak-hold signal and that of said threshold signal being reversed.

3. The defect-signal generating circuit according to claim 1, wherein upon the signal level of said peak-hold signal and that of said threshold signal being reversed, said first adjusting circuit raises the signal level of said threshold signal higher than that of a first threshold signal at the point of the signal level of said peak-hold signal falling below that of said threshold signal.

4. The defect-signal generating circuit according to claim 3, wherein said first adjusting circuit includes a first limiter for setting the upper limit of the signal level of said threshold signal.

5. The defect-signal generating circuit according to claim 1, wherein upon the signal level of said peak-hold signal and that of said threshold signal being reversed, said second adjusting circuit lowers the signal level of said threshold signal lower than that of a second threshold signal at the point of the signal level of said peak-hold signal rising higher than that of said threshold signal.

6. The defect-signal generating circuit according to claim 5, wherein said second adjusting circuit includes a second limiter for setting the lower limit of the signal level of said threshold signal.

7. The defect-signal generating circuit according to claim 1, wherein following adjusting the signal level of said threshold signal, upon the signal level of said peak-hold signal and that of said threshold signal being reversed again, said threshold-signal adjusting circuit stops adjustment of the signal level of said threshold signal.

8. The defect-signal generating circuit according to claim 1, wherein following adjusting the signal level of said threshold signal, upon a certain period elapsing, said threshold-signal adjusting circuit stops adjustment of the signal level of said threshold signal.

9. An optical disk reproducing device including a defect-signal generating circuit, said defect-signal generating circuit comprising:

a peak-hold signal generating circuit for generating a peak-hold signal by holding the peak of an RF signal read out from a recording medium;

an intermediate-signal generating circuit, which is a peak-holding circuit having a longer time constant than said peak-hold signal generating circuit, for generating an intermediate signal by holding the peak of said RF signal;

a signal-level adjusting circuit for generating a threshold signal by shifting the signal level of said intermediate signal;

a threshold-signal adjusting circuit for adjusting the signal level of said threshold signal; and

a comparator for generating a defect signal by comparing said peak-hold signal with said threshold signal;

wherein said threshold-signal adjusting circuit includes at least one of

a first adjusting circuit for adjusting the signal level of said threshold signal in the event that the signal level of said peak-hold signal falls below that of said threshold signal, due to the signal level of said peak-hold signal and that of said threshold signal being reversed, so as to raise the signal level of said threshold signal higher than that in the case of no adjustment being performed, and

a second adjusting circuit for adjusting the signal level of said threshold signal in the event that the signal level of said peak-hold signal rises above that of said threshold signal, due to the signal level of said peak-hold signal and that of said threshold signal being reversed, so as to lower the signal level of said threshold signal lower than that in the case of no adjustment being performed.