Packaged acoustic and electromagnetic transducer chips

• US 20050189635A1
• Filed: 03/01/2005
• Published: 09/01/2005
• Est. Priority Date: 03/01/2004
• Status: Abandoned Application

• Current Assignee: Tessera, Inc. (Adeia, Inc.)
• Original Assignee: Tessera, Inc. (Adeia, Inc.)
• Inventors: Haba, Belgacem, Humpston, Giles, Tuckerman, David B., Tseng, Chung-Chuan, Osborn, Philip R., Kubota, Yoichi, Burtzlaff, Robert, Thompson, Jesse Burl, Warner, Michael
• Application Number:
  US11/068,831
• Publication Number:
  US 20050189635A1
• Time in Patent Office: Days
• US Class Current: 257/678
• CPC Class Codes: B81B 2201/0257 Microphones or microspeakers
• CPC Class Codes: B81B 7/0077 Other packages not provided for in groups B81B7/0035 - B81B7/0074
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/05008 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body, e.g.
• CPC Class Codes: H01L 2224/05024 the internal layer being disposed on a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05026 the internal layer being disposed in a recess of the surface
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48228 the bond pad being disposed in a recess of the surface of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01087 Francium [Fr]
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/07811 : Extrinsic, i.e. with electrical conductive fillers
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/10155 : being other than a cuboid
• CPC Class Codes: H01L 2924/10158 : at the passive surface
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H04R 19/005 : using semiconductor materials

Abstract

Various embodiments of packaged chips and ways of fabricating them are disclosed herein. One such packaged chip disclosed herein includes a chip having a front face, a rear face opposite the front face, and a device at one of the front and rear faces, the device being operable as a transducer of at least one of acoustic energy and electromagnetic energy, and the chip including a plurality of bond pads exposed at one of the front and rear faces. The packaged chip includes a package element having a dielectric element and a metal layer disposed on the dielectric element, the package element having an inner surface facing the chip and an outer surface facing away from the chip. The metal layer includes a plurality of contacts exposed at at least one of the inner and outer surfaces, the contacts conductively connected to the bond pads. The metal layer further includes a first opening for passage of the at least one of acoustic energy and electromagnetic energy in a direction of at least one of to said device and from said device.

Claims

1. A packaged chip, comprising:

a chip having a front face, a rear face opposite said front face, said chip including a device at one of said front and rear faces, said device operable as a transducer of acoustic energy, said chip including a plurality of bond pads exposed at one of said front and rear faces; and

a package element having a dielectric element and a metal layer disposed on said dielectric element, said metal layer including a plurality of contacts conductively connected to said bond pads, said package element further including a recess in registration with said device, said chip and said recess forming a closed cavity adjacent to said device.

2. A packaged chip as claimed in claim 1, wherein said package element includes an inner surface facing said chip, an outer surface facing away from said chip, a plurality of inner via terminals disposed at said inner surface, a plurality of outer via terminals disposed at said outer surface, and vias interconnecting said inner via terminals and said outer via terminals, said metal layer further including traces extending between said contacts and said inner via terminals, said packaged chip further including wire bonds conductively connecting said bond pads to said contacts.

3. A packaged chip as claimed in claim 2, wherein said dielectric element consists essentially of a ceramic material.

4. A packaged chip as claimed in claim 2, wherein said dielectric element has a laminate structure.

5. A packaged chip, comprising:

a chip having a front face, a rear face opposite said front face, said chip including a device at one of said front and rear faces, said device operable as a transducer of acoustic energy, said chip including a plurality of bond pads exposed at one of said front and rear faces; and

a package element including a through hole, said package element including a dielectric element and a metal layer including a plurality of contacts disposed on said dielectric element, said package element further including a recess aligned to said through hole, and a lid covering said recess, one of said front and rear faces of said chip being mounted to said package element within said recess such that said chip is aligned to said through hole to permit passage of acoustic energy to and from said device and a space beyond said package element, said recess and said lid forming an enclosed cavity adjacent to another one of said front face and said rear face of said chip.

6. A packaged chip, comprising:

a chip having an acoustic transducer, said chip including a plurality of bond pads;

a package element including a dielectric element and a metal layer disposed on said dielectric element, said metal layer having a first surface contacting said dielectric element, and a second surface facing away from said dielectric element, said metal layer including a plurality of chip contacts exposed at one of said first and second surfaces, said chip contacts conductively connected to said bond pads, said package element further including a plurality of interconnects conductively connected to said chip contacts, said interconnects exposed at one of said first and second surfaces, said package element further including a first opening aligned to said acoustic transducer for passage of acoustic energy to and from said acoustic transducer; and

an interconnection element having a top surface, a bottom surface opposite said top surface, and a recess disposed between said top surface and said bottom surface, a plurality of top contacts exposed at said top surface, a plurality of bottom contacts exposed at said bottom surface, and conductive features interconnecting said top contacts to said bottom contacts, wherein said top contacts are conductively bonded to said interconnects of said package element.

7. A packaged chip as claimed in claim 6, wherein said interconnection element includes a stack of dielectric layers, wherein said conductive features include conductive elements disposed in said dielectric layers.

8. A packaged chip as claimed in claim 6, wherein said dielectric layers consist essentially of a ceramic material.

9. A packaged chip as claimed in claim 6, wherein said dielectric layers consist essentially of reinforced fiberglass.

10. An assembly including a packaged chip as claimed in claim 6, wherein said package element further includes outer contacts exposed at said one of said first and second surfaces on a side of said package element opposite said chip contacts, said assembly further comprising a circuit panel having terminals conductively mounted to said outer contacts, said circuit panel further including an opening aligned to said opening in said package element to permit passage of the acoustic energy to or from the acoustic transducer through said circuit panel.

11. An assembly including a packaged chip as claimed in claim 6, further comprising a circuit panel having terminals conductively mounted to said bottom contacts of said interconnection element, such that said first opening of said package element faces away from said circuit panel to permit passage of the acoustic energy to or from said acoustic transducer through said first opening.

12. An assembly as claimed in claim 11, wherein said bottom contacts of said circuit panel is mounted to said interconnection element by at least one of a fusible conductive material, conductive stud bumps, and an anisotropic conductive film.

13. A packaged chip, comprising:

a chip having a front face, and rear face opposite said front face, and a device at one of said front and rear faces, said device operable as a transducer of at least one of acoustic energy and electromagnetic energy, said chip including a plurality of bond pads exposed at one of said front and rear faces; and

a package element having a dielectric element and a metal layer disposed on said dielectric element, said package element having an inner surface facing said chip and an outer surface facing away from said chip, said metal layer including a plurality of contacts exposed at at least one of said inner and outer surfaces, said contacts conductively connected to said bond pads, said package element being spaced from said chip so as to define a cavity between said transducer and said package element.

14. A packaged chip as claimed in claim 13, wherein said cavity is closed.

15. An assembly including a packaged chip as claimed in claim 13, further comprising a circuit panel having terminals conductively mounted to said contacts of said package element.

16. A method of making a packaged chip, comprising:

providing a chip having a front face and a rear face, said chip including a device disposed at at least one of said front face and said rear face, said device operable as a transducer of at least one of acoustic energy and electromagnetic energy, said chip further including a plurality of bond pads exposed at one of said front face and said rear face;

providing a package element including a dielectric element and a metal layer including a plurality of contacts, said package element further including a first opening;

mounting said chip to said package element such that said first opening is aligned to said device; and

bonding said bond pads to said contacts.

17. A method of making a packaged chip as claimed in claim 16, wherein said device includes an image transducer, said method further comprising aligning a photo-scintillator element to said first opening, and mounting said aligned photo-scintillator element to said package element.

18. A method of making a packaged chip as claimed in claim 16, wherein said photo-scintillator element includes a carrier layer mounted to said package element.

19. A method of making a packaged chip as claimed in claim 18, wherein said package element has an inner surface facing said front face of said chip and said photo-scintillator element is mounted to said inner surface.