Digital predistortion system and method for linearizing an RF power amplifier with nonlinear gain characteristics and memory effects
First Claim
1. A digital predistorter adapted to receive a digital input signal and output a predistorted digital signal, the digital predistorter comprising:
- an input coupled to receive the digital input signal;
a first signal path coupled to the input;
a second signal path, coupled to the input in parallel with said first signal path, comprising a first digital predistorter circuit providing a first predistortion signal, wherein said first digital predistorter circuit comprises a detector providing a signal related to the magnitude of the digital input signal and a Look Up Table of gain error corrections indexed by said signal related to the magnitude of the digital input signal;
a third signal path, coupled to the input in parallel with said first and second signal path, comprising a second digital predistorter circuit providing a polynomial based predistortion operation on the input signal and providing a second predistortion signal; and
a combiner circuit which receives and combines the outputs of the first and second digital predistorter circuits with the output of the first signal path to provide a predistorted digital output signal.
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Abstract
A system and method of digitally predistorting a transmitter that has a digital input, up-converter, and a RF amplifier is disclosed. A digital predistorter preferably employs three paths for the digital input signal: a linear path, a memoryless digital predistortion path, and a memory based digital predistortion path. The memoryless path is preferably a look up table (LUT) of gain error corrections indexed to the input magnitude or input power. The linear path is separated to preserve the dynamic range of the system and avoid quantization associated with memoryless LUT correction. The memory based digital predistortion path filters the power envelope, or higher even order modes of the input signal magnitude, employing a hierarchical filter, to produce a gain correction. The input signal is modulated by the gain error corrections produced by the memoryless and memory based paths.
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Citations
30 Claims
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1. A digital predistorter adapted to receive a digital input signal and output a predistorted digital signal, the digital predistorter comprising:
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an input coupled to receive the digital input signal;
a first signal path coupled to the input;
a second signal path, coupled to the input in parallel with said first signal path, comprising a first digital predistorter circuit providing a first predistortion signal, wherein said first digital predistorter circuit comprises a detector providing a signal related to the magnitude of the digital input signal and a Look Up Table of gain error corrections indexed by said signal related to the magnitude of the digital input signal;
a third signal path, coupled to the input in parallel with said first and second signal path, comprising a second digital predistorter circuit providing a polynomial based predistortion operation on the input signal and providing a second predistortion signal; and
a combiner circuit which receives and combines the outputs of the first and second digital predistorter circuits with the output of the first signal path to provide a predistorted digital output signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A digital predistortion circuit adapted to receive a digital input signal and output a digital predistortion compensation signal, the digital predistortion circuit comprising:
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an input for receiving the digital input signal;
a signal power detector circuit coupled to the input and providing a digital power signal corresponding to a power of the magnitude of the input signal;
a fixed coefficient filter bank, coupled to the signal power detector circuit and providing a bandpass filtering operation on said digital power signal; and
an adaptive coefficient filter bank coupled in series with said fixed coefficient filter bank and operating on the output of said fixed coefficient filter bank, wherein the output of the adaptive filter bank is provided as a digital predistortion compensation signal. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. An adaptively linearized transmission system, comprising:
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an input adapted to receive a digital input signal;
a digital predistorter coupled to the input and receiving the digital input signal and outputting a predistorted digital signal, the digital predistorter comprising a hierarchical filter, including a fixed coefficient filter and an adaptive coefficient filter coupled in series, to compensate for memory effects of the transmission system;
a digital to analog converter coupled to receive the predistorted digital signal output of the digital predistorter and provide an analog signal;
an up converter for receiving the analog signal from the digital to analog converter and converting it to an RF analog signal;
a power amplifier receiving the RF analog signal and providing an amplified RF output signal;
an output sampling coupler coupled to sample the analog RF output signal from the power amplifier;
a feedback circuit path, coupled to the output sampling coupler, comprising a down converter and an analog to digital converter converting the sampled RF output signal to a digital sampled signal representative of the RF output signal;
a forward gain mapping circuit coupled to receive the input signal and providing a model of the effect of the digital predistorter and power amplifier on the input signal;
an error generator circuit coupled to receive the output of the forward gain mapping circuit and the digital sampled signal from the feedback circuit path and providing a digital error signal from the difference between the signals; and
an adaptive coefficient estimator circuit, coupled to receive the digital input signal and the digital error signal and providing updated predistortion coefficients to the adaptive filter in said digital predistorter. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24)
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25. A method for digitally predistorting a digital input signal to compensate for memory effect distortion in a transmission system including an RF power amplifier, comprising:
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receiving a digital input signal;
deriving a digital power signal corresponding to a power of the magnitude of the input signal;
performing a first filtering operation on said digital power signal employing a fixed set of filter coefficients to provide a first filtered signal;
performing a second filtering operation on said first filtered signal employing an adaptive set of filter coefficients to provide a second filtered signal; and
providing a predistortion compensation signal from said second filtered signal. - View Dependent Claims (26, 27, 28, 29, 30)
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Specification