Programmable gain instrumentation amplifier including a composite amplifier for level shifting and improved signal-to-noise ratio

• US 20050195027A1
• Filed: 04/18/2005
• Published: 09/08/2005
• Est. Priority Date: 08/17/2004
• Status: Active Grant

• Current Assignee: National Instruments Corporation (Emerson Electric Company)
• Original Assignee: National Instruments Corporation (Emerson Electric Company)
• Inventors: Regier, Christopher G., Wangsanata, Antony, Daigle, Clayton H., Sjoboen, Lauren
• Granted Patent: US 7,183,854 B2
• Time in Patent Office: Days
• US Class Current: 330/129
• CPC Class Codes: H03G 1/0088 using discontinuously variable devices, e.g. switch-operated

Abstract

A PGIA for use in measurement devices (e.g., data acquisition device) including a composite amplifier for level shifting and improved signal-to-noise ratio. The composite amplifier may level shift from a constant common mode voltage to a lower common mode voltage with a large voltage swing. The large output signal swing of the PGIA may allow excellent signal-to-noise ratio. Additionally, input op-amps of the PGIA may be bootstrapped so that their supply rails move according to an input signal of the PGIA. The PGIA may also include protection circuitry to protect components from damage, e.g., due to over-current conditions, and to keep all op-amps in proper closed loop operation. Furthermore, the PGIA may include DA compensation circuitry to cancel some dielectric absorptions effects and improve a step response of the PGIA and CMRR enhancement circuitry to increase symmetry at inputs of the PGIA and improve a CMRR associated with the PGIA.

Claims

1. An instrumentation amplifier for use in a measurement device, the instrumentation amplifier comprising:

an output terminal; and

a composite amplifier comprising;

a first input terminal, and

an output terminal, wherein the output terminal of the composite amplifier is coupled to the output terminal of the instrumentation amplifier,

wherein the first input terminal of the composite amplifier is operable to remain at a constant common mode voltage, wherein the composite amplifier is operable to level shift from the constant common mode voltage to a lower common mode voltage with a large voltage swing.

2. The instrumentation amplifier of claim 1, wherein the composite amplifier further comprises:

a second input terminal,

a first op-amp,

a second op-amp, and

a first transistor,

wherein an inverting input terminal of the first op-amp is coupled to the first input terminal of the composite amplifier and to the first transistor, a noninverting input terminal of the first op-amp is coupled to the second input terminal of the composite amplifier, a noninverting input terminal of the second op-amp is coupled to an output terminal of the first op-amp, an inverting terminal of the second op-amp is coupled to the first transistor, and an output terminal of the second op-amp is coupled to the output terminal of the composite amplifier.

3. The instrumentation amplifier of claim 1, wherein the composite amplifier further comprises:

a second input terminal,

a first op-amp,

a second op-amp, and

a first MOSFET,

wherein an inverting input terminal of the first op-amp is coupled to the first input terminal of the composite amplifier and to a gate terminal of the first MOSFET, a noninverting input terminal of the first op-amp is coupled to the second input terminal of the composite amplifier, a noninverting input terminal of the second op-amp is coupled to an output terminal of the first op-amp, an inverting terminal of the second op-amp is coupled to a source terminal of the first MOSFET, and an output terminal of the second op-amp is coupled to the output terminal of the composite amplifier.

4. The instrumentation amplifier of claim 3, further comprising:

a negative input terminal,

a second MOSFET, and

a third op-amp including a noninverting input terminal, an inverting input terminal, and an output terminal, wherein one of the input terminals of the third op-amp is coupled to the negative input terminal of the instrumentation amplifier,

wherein the first input terminal of the composite amplifier is coupled to a drain terminal of the second MOSFET, and a gate terminal of the second MOSFET is coupled to the output terminal of the third op-amp.

5. The instrumentation amplifier of claim 3, wherein the first op-amp is configured as a precision op-amp and the second op-amp is configured as a high-speed op-amp.

6. The instrumentation amplifier of claim 1, wherein the first input terminal of the composite amplifier is operable to remain at a constant common mode voltage of twelve volts.

7. The instrumentation amplifier of claim 1, wherein the composite amplifier is operable to level shift from the constant common mode voltage to a lower common mode voltage, including a superimposed signal having a large voltage swing of twenty volts, to improve a signal-to-noise ratio associated with an output signal of the instrumentation amplifier.

8. The instrumentation amplifier of claim 1, wherein the composite amplifier allows level shifting, scaling, and current-to-voltage conversion to be combined into a single stage.

9. The instrumentation amplifier of claim 1, further comprising:

a negative input terminal;

a positive input terminal;

a third op-amp comprising a noninverting input terminal, an inverting input terminal, and an output terminal, wherein one of the input terminals of the third op-amp is coupled to the negative input terminal of the instrumentation amplifier; and

a fourth op-amp comprising a noninverting input terminal, an inverting input terminal, and an output terminal, wherein one of the input terminals of the fourth op-amp is coupled to the positive input terminal of the instrumentation amplifier.

10. The instrumentation amplifier of claim 9, further comprising a first protection circuit coupled to the output terminal of the fourth op-amp to protect the instrumentation amplifier from over-current conditions.

11. The instrumentation amplifier of claim 9, further comprising a second protection circuit coupled to the output terminal of the third op-amp to protect the instrumentation amplifier from over-current conditions.

12. The instrumentation amplifier of claim 9, wherein the third and the fourth op-amps are bootstrapped so that supply rails associated with each of the third and fourth op-amps move according to an input signal of the instrumentation amplifier.

13. The instrumentation amplifier of claim 9, further comprising a dielectric absorption (DA) compensation circuit coupled to the output terminal of the third op-amp, wherein the DA compensation circuit is operable to compensate for a dielectric absorption error and improve a step response of the instrumentation amplifier with a first order approximation to an inverse of the dielectric absorption error.

14. The instrumentation amplifier of claim 13, further comprising a common-mode rejection ratio (CMRR) enhancement circuit coupled in parallel to the DA compensation circuit, wherein the CMRR enhancement circuit is operable to delay an input received at the negative input terminal of the instrumentation amplifier to improve a CMRR of the instrumentation amplifier.

15. The instrumentation amplifier of claim 14, wherein the CMRR enhancement circuit is operable to delay the input signal received at the negative input terminal a particular amount such that the input signal received at the negative input terminal will be in phase with an input signal received at the positive input terminal of the instrumentation amplifier, to improve the CMRR of the instrumentation amplifier.

16. The instrumentation amplifier of claim 1, configured as a programmable gain instrumentation amplifier (PGIA).

17. The instrumentation amplifier of claim 4, further comprising a single current source, wherein the current source is coupled to a source terminal of the second MOSFET.

18. A data acquisition device, comprising:

one or more analog-to-digital converters (ADCs) operable to convert received analog data into digital data; and

a programmable gain instrumentation amplifier (PGIA) coupled to the one or more ADCs, the PGIA comprising;

an output terminal, and

a composite amplifier comprising;

a first input terminal, and

an output terminal, wherein the output terminal of the composite amplifier is coupled to the output terminal of the PGIA,

wherein the first input terminal of the composite amplifier is operable to remain at a constant common mode voltage, wherein the composite amplifier is operable to level shift from the constant common mode voltage to a lower common mode voltage with a large voltage swing.

19. The data acquisition device of claim 18, wherein the composite amplifier further comprises:

a second input terminal,

a first op-amp,

a second op-amp, and

a first transistor,

wherein an inverting input terminal of the first op-amp is coupled to the first input terminal of the composite amplifier and to the first transistor, a noninverting input terminal of the first op-amp is coupled to the second input terminal of the composite amplifier, a noninverting input terminal of the second op-amp is coupled to an output terminal of the first op-amp, an inverting terminal of the second op-amp is coupled to the first transistor, and an output terminal of the second op-amp is coupled to the output terminal of the composite amplifier.

20. The data acquisition device of claim 18, wherein the first input terminal of the composite amplifier is operable to remain at a constant common mode voltage of twelve volts.

21. The data acquisition device of claim 18, wherein the composite amplifier is operable to level shift from the constant common mode voltage to a lower common mode voltage, including a superimposed signal having a large voltage swing of twenty volts, to improve a signal-to-noise ratio associated with an output signal of the PGIA.

22. The data acquisition device of claim 18, wherein the composite amplifier allows level shifting, scaling, and current-to-voltage conversion to be combined into a single stage.

23. The data acquisition device of claim 18, wherein the PGIA further comprises:

a negative input terminal;

a positive input terminal;

a third op-amp comprising a noninverting input terminal, an inverting input terminal, and an output terminal, wherein one of the input terminals of the third op-amp is coupled to the negative input terminal of the PGIA; and

a fourth op-amp comprising a noninverting input terminal, an inverting input terminal, and an output terminal, wherein one of the input terminals of the fourth op-amp is coupled to the positive input terminal of the PGIA.

24. The data acquisition device of claim 23, further comprising a first protection circuit coupled to the output terminal of the fourth op-amp to protect the PGIA from over-current conditions.

25. The data acquisition device of claim 23, further comprising a second protection circuit coupled to the output terminal of the third op-amp to protect the PGIA from over-current conditions.

26. The data acquisition device of claim 23, wherein the third and the fourth op-amps are bootstrapped so that supply rails associated with each of the third and fourth op-amps move according to an input signal of the PGIA.

27. The data acquisition device of claim 23, further comprising a DA compensation circuit coupled to the output terminal of the third op-amp, wherein the DA compensation circuit is operable to compensate for a dielectric absorption error and improve a step response of the PGIA with a first order approximation to an inverse of the dielectric absorption error.

28. The data acquisition device of claim 27, further comprising a CMRR enhancement circuit coupled in parallel to the DA compensation circuit, wherein the CMRR enhancement circuit is operable to delay an input received at the negative input terminal of the PGIA to improve a CMRR of the PGIA.

29. The data acquisition device of claim 28, wherein the CMRR enhancement circuit is operable to delay the input signal received at the negative input terminal a particular amount such that the input signal received at the negative input terminal will be in phase with an input signal received at the positive input terminal of the PGIA, to improve the CMRR of the PGIA.

30. The data acquisition device of claim 18, comprised in a data acquisition system including a computer system for processing data obtained from one or more data acquisition processes.

31. The data acquisition device of claim 30, comprised in a data acquisition system further including a unit under test (UUT), wherein the UUT includes a sensor operable to provide the data acquisition device with sensor data.

32. The data acquisition device of claim 18, wherein the PGIA further comprises a single current source.

33. The data acquisition device of claim 18, wherein the PGIA further comprises a clamping circuit coupled between the first input terminal and the output terminal of the composite amplifier.

34. A PGIA for use in a data acquisition device, the PGIA comprising:

an output terminal; and

a composite amplifier comprising a first input terminal, a second input terminal, and an output terminal, wherein the output terminal of the composite amplifier is coupled to the output terminal of the PGIA, wherein the composite amplifier also comprises a first op-amp, a second op-amp, and a transistor, wherein an inverting input terminal of the first op-amp is coupled to the first input terminal of the composite amplifier and to the transistor, a noninverting input terminal of the first op-amp is coupled to the second input terminal of the composite amplifier, a noninverting input terminal of the second op-amp is coupled to an output terminal of the first op-amp, an inverting terminal of the second op-amp is coupled to the transistor, and an output terminal of the second op-amp is coupled to the output terminal of the composite amplifier.

35. A PGIA for use in a data acquisition device, the PGIA comprising:

a negative input terminal;

a positive input terminal;

an output terminal;

a composite amplifier comprising a first input terminal, a second input terminal, and an output terminal, wherein the output terminal of the composite amplifier is coupled to the output terminal of the PGIA, wherein the composite amplifier also comprises a first op-amp, a second op-amp, and a transistor, wherein an inverting input terminal of the first op-amp is coupled to the first input terminal of the composite amplifier and to the transistor, a noninverting input terminal of the first op-amp is coupled to the second input terminal of the composite amplifier, a noninverting input terminal of the second op-amp is coupled to an output terminal of the first op-amp, an inverting terminal of the second op-amp is coupled to the transistor, and an output terminal of the second op-amp is coupled to the output terminal of the composite amplifier;

a third op-amp comprising a noninverting input terminal, an inverting input terminal, and an output terminal, wherein one of the input terminals of the third op-amp is coupled to the negative input terminal of the PGIA;

a fourth op-amp comprising a noninverting input terminal, an inverting input terminal, and an output terminal, wherein one of the input terminals of the fourth op-amp is coupled to the positive input terminal of the PGIA;

a first protection circuit coupled to the output terminal of the fourth op-amp to protect the PGIA from over-current conditions; and

a second protection circuit coupled to the output terminal of the third op-amp to protect the PGIA from over-current conditions;

wherein the third and the fourth op-amps are bootstrapped so that supply rails associated with each of the third and fourth op-amps move according to an input signal of the PGIA.

36. A data acquisition device, comprising:

one or more analog-to-digital converters (ADCs) operable to convert received analog data into digital data; and

a programmable gain instrumentation amplifier (PGIA) coupled to the one or more ADCs, the PGIA comprising;

a negative input terminal;

a positive input terminal;

an output terminal;

a composite amplifier comprising a first input terminal, a second input terminal, and an output terminal, wherein the output terminal of the composite amplifier is coupled to the output terminal of the PGIA, wherein the composite amplifier also comprises a first op-amp, a second op-amp, and a transistor, wherein an inverting input terminal of the first op-amp is coupled to the first input terminal of the composite amplifier and to the transistor, a noninverting input terminal of the first op-amp is coupled to the second input terminal of the composite amplifier, a noninverting input terminal of the second op-amp is coupled to an output terminal of the first op-amp, an inverting terminal of the second op-amp is coupled to the transistor, and an output terminal of the second op-amp is coupled to the output terminal of the composite amplifier;

a third op-amp comprising a noninverting input terminal, an inverting input terminal, and an output terminal, wherein one of the input terminals of the third op-amp is coupled to the negative input terminal of the PGIA;

a fourth op-amp comprising a noninverting input terminal, an inverting input terminal, and an output terminal, wherein one of the input terminals of the fourth op-amp is coupled to the positive input terminal of the PGIA;

a DA compensation circuit coupled to the output terminal of the third op-amp, wherein the DA compensation circuit is operable to compensate for a dielectric absorption error and improve a step response of the PGIA with a first order approximation to an inverse of the dielectric absorption error; and

a CMRR enhancement circuit coupled in parallel to the DA compensation circuit, wherein the CMRR enhancement circuit is operable to delay an input received at the negative input terminal of the PGIA to improve a CMRR of the PGIA.

36-1. An instrumentation amplifier for use in a measurement device, the instrumentation amplifier comprising:

a gain multiplexer;

a negative input terminal;

a positive input terminal;

a third op-amp comprising a noninverting input terminal, an inverting input terminal, and an output terminal, wherein one of the input terminals of the third op-amp is coupled to the positive input terminal of the instrumentation amplifier; and

a first protection circuit coupled between the output terminal of the third op-amp and the gain multiplexer, wherein the first protection circuit includes a plurality of transistors, wherein a collector terminal of a first transistor is coupled to the output terminal of the third op-amp and an emitter terminal of the first transistor is coupled to an emitter terminal of a second transistor, wherein a base terminal of the first transistor is coupled to a base terminal of the second transistor, wherein a collector terminal of the second transistor is coupled to the gain multiplexer, wherein a collector terminal of a third transistor is coupled to the output terminal of the third op-amp, to a base terminal of the third transistor, and to the collector terminal of the first transistor, wherein an emitter terminal of the third transistor is coupled to a collector terminal a fourth transistor, wherein a base terminal of the fourth transistor is coupled to the collector terminal of the fourth transistor, wherein an emitter terminal of the fourth transistor is coupled to one of the input terminals of the third op-amp to form a feedback path, wherein the emitter terminal of the fourth transistor is coupled to a fifth transistor, wherein the fifth transistor is coupled to the gain multiplexer;

wherein the first protection circuit is operable to isolate the third op-amp from the gain multiplexer during overload conditions, wherein in response to an overload condition the first and second transistors and the fifth transistor turn off to isolate the third op-amp from the gain multiplexer, and the third and fourth transistors turn on to open the feedback path to one of the input terminals of the third op-amp.